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authorbernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4>2015-03-27 13:02:39 +0000
committerbernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4>2015-03-27 13:02:39 +0000
commited22b54075707bbf1b859cb36aac0ef0219b6522 (patch)
treeb971a7518e94f485f2a0525d361327b53582c6af /gcc/config/c6x
parent96d2bfe051067238d4494898eda3a9b6216fd7f3 (diff)
downloadgcc-ed22b54075707bbf1b859cb36aac0ef0219b6522.tar.gz
Allow misaligned volatile stores in C6X.
* config/c6x/c6x.md (movmisalign<mode>): Use MEM_P, not memory_operand. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@221732 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/c6x')
-rw-r--r--gcc/config/c6x/c6x.md2
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/c6x/c6x.md b/gcc/config/c6x/c6x.md
index fafefa6eca2..e957eca6e38 100644
--- a/gcc/config/c6x/c6x.md
+++ b/gcc/config/c6x/c6x.md
@@ -775,7 +775,7 @@
UNSPEC_MISALIGNED_ACCESS))]
"TARGET_INSNS_64"
{
- if (memory_operand (operands[0], <MODE>mode))
+ if (MEM_P (operands[0]))
{
emit_insn (gen_movmisalign<mode>_store (operands[0], operands[1]));
DONE;