* config/bfin/bfin.opt (micplb): New option.

	* config/bfin/linux.h (SUBTARGET_DRIVER_SELF_SPECS): Set it.
	* config/bfin/bfin-protos.h (WA_INDIRECT_CALLS,
	ENABLE_WA_INDIRECT_CALLS): New macros.
	* config/bfin/bfin.c (bfin_cpus): Add WA_INDIRECT_CALLS to
	all 54x CPUs.
	(indirect_call_p): New function.
	(workaround_speculation): Handle anomaly 05-00-0426 when
	ENABLE_WA_INDIRECT_CALLS is true.
	* config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define
	__WORKAROUND_INDIRECT_CALLS if ENABLE_WA_INDIRECT_CALLS.
	* doc/invoke.texi (Blackfin Options): Document -micplb.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@142240 138bc75d-0d04-0410-961f-82ee72b054a4

5 files changed, 55 insertions, 18 deletions

diff --git a/gcc/config/bfin/bfin-protos.h b/gcc/config/bfin/bfin-protos.h
index 523c673ba43..3e9ae4317c3 100644
--- a/gcc/config/bfin/bfin-protos.h
+++ b/gcc/config/bfin/bfin-protos.h
@@ -75,6 +75,11 @@ extern unsigned int bfin_workarounds;
 #define ENABLE_WA_RETS \
   (bfin_workarounds & WA_RETS)
 
+/* For the anomaly 05-00-0426 */
+#define WA_INDIRECT_CALLS 0x00000008
+#define ENABLE_WA_INDIRECT_CALLS \
+  ((bfin_workarounds & WA_INDIRECT_CALLS) && !TARGET_ICPLB)
+
 #define WA_05000257 0x00000040
 #define ENABLE_WA_05000257 \
   (bfin_workarounds & WA_05000257)
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index e9c6297513c..949ceaca015 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -254,39 +254,39 @@ struct bfin_cpu bfin_cpus[] =
    | WA_05000283 | WA_05000257 | WA_05000315},
 
   {"bf542", BFIN_CPU_BF542, 0x0002,
-   WA_SPECULATIVE_LOADS},
+   WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
   {"bf542", BFIN_CPU_BF542, 0x0001,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
   {"bf542", BFIN_CPU_BF542, 0x0000,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
 
   {"bf544", BFIN_CPU_BF544, 0x0002,
-   WA_SPECULATIVE_LOADS},
+   WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
   {"bf544", BFIN_CPU_BF544, 0x0001,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
   {"bf544", BFIN_CPU_BF544, 0x0000,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
 
   {"bf547", BFIN_CPU_BF547, 0x0002,
-   WA_SPECULATIVE_LOADS},
+   WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
   {"bf547", BFIN_CPU_BF547, 0x0001,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
   {"bf547", BFIN_CPU_BF547, 0x0000,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
 
   {"bf548", BFIN_CPU_BF548, 0x0002,
-   WA_SPECULATIVE_LOADS},
+   WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
   {"bf548", BFIN_CPU_BF548, 0x0001,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
   {"bf548", BFIN_CPU_BF548, 0x0000,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
 
   {"bf549", BFIN_CPU_BF549, 0x0002,
-   WA_SPECULATIVE_LOADS},
+   WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS},
   {"bf549", BFIN_CPU_BF549, 0x0001,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
   {"bf549", BFIN_CPU_BF549, 0x0000,
-   WA_SPECULATIVE_LOADS | WA_RETS},
+   WA_SPECULATIVE_LOADS | WA_RETS | WA_INDIRECT_CALLS},
 
   {"bf561", BFIN_CPU_BF561, 0x0005, WA_RETS
    | WA_05000283 | WA_05000315},
@@ -4921,6 +4921,22 @@ find_load (rtx insn)
   return NULL_RTX;
 }
 
+/* Determine whether PAT is an indirect call pattern.  */
+static bool
+indirect_call_p (rtx pat)
+{
+  if (GET_CODE (pat) == PARALLEL)
+    pat = XVECEXP (pat, 0, 0);
+  if (GET_CODE (pat) == SET)
+    pat = SET_SRC (pat);
+  gcc_assert (GET_CODE (pat) == CALL);
+  pat = XEXP (pat, 0);
+  gcc_assert (GET_CODE (pat) == MEM);
+  pat = XEXP (pat, 0);
+  
+  return REG_P (pat);
+}
+
 static void
 workaround_speculation (void)
 {
@@ -4929,7 +4945,8 @@ workaround_speculation (void)
   int cycles_since_jump = INT_MAX;
   int delay_added = 0;
 
-  if (! ENABLE_WA_SPECULATIVE_LOADS && ! ENABLE_WA_SPECULATIVE_SYNCS)
+  if (! ENABLE_WA_SPECULATIVE_LOADS && ! ENABLE_WA_SPECULATIVE_SYNCS
+      && ! ENABLE_WA_INDIRECT_CALLS)
     return;
 
   /* First pass: find predicted-false branches; if something after them
@@ -4962,6 +4979,15 @@ workaround_speculation (void)
 	  else
 	    cycles_since_jump = INT_MAX;
 	}
+      else if (CALL_P (insn))
+	{
+	  if (cycles_since_jump < INT_MAX)
+	    cycles_since_jump++;
+	  if (indirect_call_p (pat) && ENABLE_WA_INDIRECT_CALLS)
+	    {
+	      delay_needed = 3;
+	    }
+	}
       else if (INSN_P (insn))
 	{
 	  rtx load_insn = find_load (insn);
diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h
index a5ab7f5a346..cf706b7cc8c 100644
--- a/gcc/config/bfin/bfin.h
+++ b/gcc/config/bfin/bfin.h
@@ -149,8 +149,10 @@ extern int target_flags;
 	builtin_define ("__WORKAROUND_SPECULATIVE_LOADS");		\
       if (ENABLE_WA_SPECULATIVE_SYNCS)					\
 	builtin_define ("__WORKAROUND_SPECULATIVE_SYNCS");		\
+      if (ENABLE_WA_SPECULATIVE_SYNCS)					\
+	builtin_define ("__WORKAROUND_INDIRECT_CALLS");			\
       if (ENABLE_WA_RETS)						\
-	builtin_define ("__WORKAROUND_RETS");		\
+	builtin_define ("__WORKAROUND_RETS");				\
 						\
       if (TARGET_FDPIC)				\
 	{					\
diff --git a/gcc/config/bfin/bfin.opt b/gcc/config/bfin/bfin.opt
index 9df88432d54..633e13598bb 100644
--- a/gcc/config/bfin/bfin.opt
+++ b/gcc/config/bfin/bfin.opt
@@ -95,3 +95,7 @@ Build for Core B
 msdram
 Target Report Mask(SDRAM)
 Build for SDRAM
+
+micplb
+Target Report Mask(ICPLB)
+Assume ICPLBs are enabled at runtime.
diff --git a/gcc/config/bfin/linux.h b/gcc/config/bfin/linux.h
index b5732011224..b786dcb6fff 100644
--- a/gcc/config/bfin/linux.h
+++ b/gcc/config/bfin/linux.h
@@ -1,6 +1,6 @@
 #undef SUBTARGET_DRIVER_SELF_SPECS
 #define SUBTARGET_DRIVER_SELF_SPECS \
-  "%{!mno-fdpic:-mfdpic}",
+  "%{!mno-fdpic:-mfdpic} -micplb",
 
 #undef TARGET_OS_CPP_BUILTINS
 #define TARGET_OS_CPP_BUILTINS() LINUX_TARGET_OS_CPP_BUILTINS()