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| author | bernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-04-11 14:40:55 +0000 |
|---|---|---|
| committer | bernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4> | 2008-04-11 14:40:55 +0000 |
| commit | 87943377315aebb9dbe539bae0a87829a6c22071 (patch) | |
| tree | 0e38d51e4c942999391bd69d58cb8d526275a728 /gcc/config/bfin/bfin.md | |
| parent | ffeeba75e6b0ff4d7fd8024a7a2df4eb7052bf08 (diff) | |
| download | gcc-87943377315aebb9dbe539bae0a87829a6c22071.tar.gz | |
* config/bfin/constraints.md: New file.
* config/bfin/bfin.md: Include it.
(adddi3): Use satisfies_constraint functions instead of the old macros.
* config/bfin/bfin.h (REG_CLASS_FROM_LETTER, CONSTRAINT_LEN,
CONST_18UBIT_IMM_P, CONST_16BIT_IMM_P, CONST_16UBIT_IMM_P,
CONST_7BIT_IMM_P, CONST_7NBIT_IMM_P, CONST_5UBIT_IMM_P,
CONST_4BIT_IMM_P, CONST_4UBIT_IMM_P, CONST_3BIT_IMM_P,
CONST_3UBIT_IMM_P, CONST_OK_FOR_K, CONST_OK_FOR_P, CONST_OK_FOR_M,
CONST_OK_FOR_CONSTRAINT_P, CONST_DOUBLE_OK_FOR_LETTER,
EXTRA_CONSTRAINT): Delete.
* config/bfin/predicates.md (highbits_operand, reg_or_7bit_operand,
reg_or_neg7bit_operand): Use satisfies_constraint functions instead
of the old macros.
* config/bfin/bfin.c: Include "tm-constrs.h".
(bfin_secondary_reload, split_load_immediate, bfin_rtx_costs):
Use satisfies_constraint functions instead of the old macros.
* doc/md.texi (Blackfin Constraints): Update file name reference.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@134198 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/bfin/bfin.md')
| -rw-r--r-- | gcc/config/bfin/bfin.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md index 2a4631dd66d..f535799b624 100644 --- a/gcc/config/bfin/bfin.md +++ b/gcc/config/bfin/bfin.md @@ -258,7 +258,7 @@ ;; Operand and operator predicates (include "predicates.md") - +(include "constraints.md") ;;; FRIO branches have been optimized for code density ;;; this comes at a slight cost of complexity when @@ -1018,7 +1018,7 @@ xops[7] = gen_rtx_REG (BImode, REG_CC); if (!register_operand (xops[4], SImode) && (GET_CODE (xops[4]) != CONST_INT - || !CONST_OK_FOR_K (INTVAL (xops[4]), "Ks7"))) + || !satisfies_constraint_Ks7 (xops[4]))) xops[4] = force_reg (SImode, xops[4]); if (!reg_overlap_mentioned_p (operands[0], operands[1]) && !reg_overlap_mentioned_p (operands[0], operands[2])) @@ -1027,7 +1027,7 @@ emit_insn (gen_movbisi (xops[6], xops[7])); if (!register_operand (xops[5], SImode) && (GET_CODE (xops[5]) != CONST_INT - || !CONST_OK_FOR_K (INTVAL (xops[5]), "Ks7"))) + || !satisfies_constraint_Ks7 (xops[5]))) xops[5] = force_reg (SImode, xops[5]); if (xops[5] != const0_rtx) emit_insn (gen_addsi3 (xops[1], xops[3], xops[5])); |