diff options
author | jgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-09-06 13:53:51 +0000 |
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committer | jgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-09-06 13:53:51 +0000 |
commit | 57a7b13e245fec0460aba24ab0c462100e376cfc (patch) | |
tree | cdbd32cf52c3c8bcb88901802d5fa317f4ec4dc7 /gcc/config/arm/vfp.md | |
parent | 07f550dfe305d53221f1a55f2d56de662af33520 (diff) | |
download | gcc-57a7b13e245fec0460aba24ab0c462100e376cfc.tar.gz |
[AArch64, ARM] Rename the FCPYS type to FMOV
gcc/
* config/arm/types.md (type): Rename fcpys to fmov.
* config/arm/vfp.md
(*arm_movsi_vfp): Rename type fcpys as fmov.
(*thumb2_movsi_vfp): Likewise
(*movhf_vfp_neon): Likewise
(*movhf_vfp): Likewise
(*movsf_vfp): Likewise
(*thumb2_movsf_vfp): Likewise
(*movsfcc_vfp): Likewise
(*thumb2_movsfcc_vfp): Likewise
* config/aarch64/aarch64-simd.md
(move_lo_quad_<mode>): Replace type mov_reg with fmovs.
* config/aarch64/aarch64.md
(*movsi_aarch64): Replace type mov_reg with fmovs.
(*movdi_aarch64): Likewise
(*movsf_aarch64): Likewise
(*movdf_aarch64): Likewise
* config/arm/arm.c
(cortexa7_older_only): Rename TYPE_FCPYS to TYPE_FMOV.
* config/arm/iwmmxt.md
(*iwmmxt_movsi_insn): Rename type fcpys as fmov.
* config/arm/arm1020e.md: Update with new attributes.
* config/arm/cortex-a15-neon.md: Update with new attributes.
* config/arm/cortex-a5.md: Update with new attributes.
* config/arm/cortex-a53.md: Update with new attributes.
* config/arm/cortex-a7.md: Update with new attributes.
* config/arm/cortex-a8-neon.md: Update with new attributes.
* config/arm/cortex-a9.md: Update with new attributes.
* config/arm/cortex-m4-fpu.md: Update with new attributes.
* config/arm/cortex-r4f.md: Update with new attributes.
* config/arm/marvell-pj4.md: Update with new attributes.
* config/arm/vfp11.md: Update with new attributes.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@202331 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arm/vfp.md')
-rw-r--r-- | gcc/config/arm/vfp.md | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index 3001751e749..9318e49d9ea 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -53,7 +53,7 @@ } " [(set_attr "predicable" "yes") - (set_attr "type" "mov_reg,mov_reg,mvn_imm,mov_imm,load1,store1,f_mcr,f_mrc,fcpys,f_loads,f_stores") + (set_attr "type" "mov_reg,mov_reg,mvn_imm,mov_imm,load1,store1,f_mcr,f_mrc,fmov,f_loads,f_stores") (set_attr "pool_range" "*,*,*,*,4096,*,*,*,*,1020,*") (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")] ) @@ -100,7 +100,7 @@ " [(set_attr "predicable" "yes") (set_attr "predicable_short_it" "yes,no,yes,no,no,no,no,no,no,no,no,no,no,no") - (set_attr "type" "mov_reg,mov_reg,mov_reg,mvn_reg,mov_reg,load1,load1,store1,store1,f_mcr,f_mrc,fcpys,f_loads,f_stores") + (set_attr "type" "mov_reg,mov_reg,mov_reg,mvn_reg,mov_reg,load1,load1,store1,store1,f_mcr,f_mrc,fmov,f_loads,f_stores") (set_attr "length" "2,4,2,4,4,4,4,4,4,4,4,4,4,4") (set_attr "pool_range" "*,*,*,*,*,1018,4094,*,*,*,*,*,1018,*") (set_attr "neg_pool_range" "*,*,*,*,*, 0, 0,*,*,*,*,*,1008,*")] @@ -261,7 +261,7 @@ " [(set_attr "conds" "unconditional") (set_attr "type" "neon_vld1_1_2_regs,neon_vst1_1_2_regs_vst2_2_regs,\ - load1,store1,fcpys,mov_reg,f_mcr,f_mrc,multiple") + load1,store1,fmov,mov_reg,f_mcr,f_mrc,multiple") (set_attr "length" "4,4,4,4,4,4,4,4,8")] ) @@ -311,7 +311,7 @@ } " [(set_attr "conds" "unconditional") - (set_attr "type" "load1,store1,fcpys,mov_reg,f_mcr,f_mrc,multiple") + (set_attr "type" "load1,store1,fmov,mov_reg,f_mcr,f_mrc,multiple") (set_attr "length" "4,4,4,4,4,4,8")] ) @@ -351,7 +351,7 @@ " [(set_attr "predicable" "yes") (set_attr "type" - "f_mcr,f_mrc,fconsts,f_loads,f_stores,load1,store1,fcpys,mov_reg") + "f_mcr,f_mrc,fconsts,f_loads,f_stores,load1,store1,fmov,mov_reg") (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*") (set_attr "neg_pool_range" "*,*,*,1008,*,4080,*,*,*")] ) @@ -388,7 +388,7 @@ [(set_attr "predicable" "yes") (set_attr "predicable_short_it" "no") (set_attr "type" - "f_mcr,f_mrc,fconsts,f_loads,f_stores,load1,store1,fcpys,mov_reg") + "f_mcr,f_mrc,fconsts,f_loads,f_stores,load1,store1,fmov,mov_reg") (set_attr "pool_range" "*,*,*,1018,*,4090,*,*,*") (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")] ) @@ -509,7 +509,7 @@ fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1" [(set_attr "conds" "use") (set_attr "length" "4,4,8,4,4,8,4,4,8") - (set_attr "type" "fcpys,fcpys,fcpys,f_mcr,f_mcr,f_mcr,f_mrc,f_mrc,f_mrc")] + (set_attr "type" "fmov,fmov,fmov,f_mcr,f_mcr,f_mcr,f_mrc,f_mrc,f_mrc")] ) (define_insn "*thumb2_movsfcc_vfp" @@ -532,7 +532,7 @@ ite\\t%D3\;fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1" [(set_attr "conds" "use") (set_attr "length" "6,6,10,6,6,10,6,6,10") - (set_attr "type" "fcpys,fcpys,fcpys,f_mcr,f_mcr,f_mcr,f_mrc,f_mrc,f_mrc")] + (set_attr "type" "fmov,fmov,fmov,f_mcr,f_mcr,f_mcr,f_mrc,f_mrc,f_mrc")] ) (define_insn "*movdfcc_vfp" |