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| author | Julian Brown <julian@codesourcery.com> | 2010-07-03 00:46:51 +0000 |
|---|---|---|
| committer | Sandra Loosemore <sandra@gcc.gnu.org> | 2010-07-02 20:46:51 -0400 |
| commit | 400cfcf50e5aeae792e8ef39a743b1cb6fafedd5 (patch) | |
| tree | 9f14cb8f4c3701b249e5dd7502eece5a6c4374e7 /gcc/config/arm/vec-common.md | |
| parent | bab53516d0a58120f1d3b24aabc09a3d7e6443aa (diff) | |
| download | gcc-400cfcf50e5aeae792e8ef39a743b1cb6fafedd5.tar.gz | |
re PR target/43703 (Unexpected floating point precision loss due to ARM NEON autovectorization)
2010-07-02 Julian Brown <julian@codesourcery.com>
Sandra Loosemore <sandra@codesourcery.com>
PR target/43703
gcc/
* config/arm/vec-common.md (add<mode>3, sub<mode>3, smin<mode>3)
(smax<mode>3): Disable for NEON float modes when
flag_unsafe_math_optimizations is false.
* config/arm/neon.md (*add<mode>3_neon, *sub<mode>3_neon)
(*mul<mode>3_neon)
(mul<mode>3add<mode>_neon, mul<mode>3neg<mode>add<mode>_neon)
(reduc_splus_<mode>, reduc_smin_<mode>, reduc_smax_<mode>): Disable
for NEON float modes when flag_unsafe_math_optimizations is false.
(quad_halves_<code>v4sf): Only enable if flag_unsafe_math_optimizations
is true.
* doc/invoke.texi (ARM Options): Add note about floating point
vectorization requiring -funsafe-math-optimizations.
gcc/testsuite/
* gcc.dg/vect/vect.exp: Add -ffast-math for NEON.
* gcc.dg/vect/vect-reduc-6.c: Add XFAIL for NEON.
Co-Authored-By: Sandra Loosemore <sandra@codesourcery.com>
From-SVN: r161763
Diffstat (limited to 'gcc/config/arm/vec-common.md')
| -rw-r--r-- | gcc/config/arm/vec-common.md | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/gcc/config/arm/vec-common.md b/gcc/config/arm/vec-common.md index d33fdf99d70..b724a580cc3 100644 --- a/gcc/config/arm/vec-common.md +++ b/gcc/config/arm/vec-common.md @@ -57,7 +57,8 @@ [(set (match_operand:VALL 0 "s_register_operand" "") (plus:VALL (match_operand:VALL 1 "s_register_operand" "") (match_operand:VALL 2 "s_register_operand" "")))] - "TARGET_NEON + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" { }) @@ -66,7 +67,8 @@ [(set (match_operand:VALL 0 "s_register_operand" "") (minus:VALL (match_operand:VALL 1 "s_register_operand" "") (match_operand:VALL 2 "s_register_operand" "")))] - "TARGET_NEON + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" { }) @@ -75,7 +77,9 @@ [(set (match_operand:VALLW 0 "s_register_operand" "") (mult:VALLW (match_operand:VALLW 1 "s_register_operand" "") (match_operand:VALLW 2 "s_register_operand" "")))] - "TARGET_NEON || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)" + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) + || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)" { }) @@ -83,7 +87,8 @@ [(set (match_operand:VALLW 0 "s_register_operand" "") (smin:VALLW (match_operand:VALLW 1 "s_register_operand" "") (match_operand:VALLW 2 "s_register_operand" "")))] - "TARGET_NEON + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" { }) @@ -101,7 +106,8 @@ [(set (match_operand:VALLW 0 "s_register_operand" "") (smax:VALLW (match_operand:VALLW 1 "s_register_operand" "") (match_operand:VALLW 2 "s_register_operand" "")))] - "TARGET_NEON + "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode) + || flag_unsafe_math_optimizations)) || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))" { }) |