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| author | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-03-21 11:19:23 +0000 |
|---|---|---|
| committer | rearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-03-21 11:19:23 +0000 |
| commit | cd4e07db265d6ab1c3c3e9ad5ec2d78a8c8a76f6 (patch) | |
| tree | 8dd9b4b1472e94b3d93e543f0337299f58f2adfa /gcc/config/arm/neon.ml | |
| parent | 42299e2e6a3451c133b4552bdc6b56bef7464dad (diff) | |
| download | gcc-cd4e07db265d6ab1c3c3e9ad5ec2d78a8c8a76f6.tar.gz | |
* neon.md (neon_vget_lanev2di): Use gen_lowpart and gen_highpart.
* config/arm/neon.ml (Fixed_return_reg): Renamed to fixed_vector_reg.
All callers changed.
(Fixed_core_reg): New feature.
(Vget_lane [sizes S64 and U64]): Add Fixed_core_reg. Allow fmrrd in
disassembly.
* neon-testgen.ml: Handle Fixed_core_reg.
* gcc.target/arm/neon/vgetQ_laneu64.c: Regenerated.
* gcc.target/arm/neon/vgetQ_lanes64.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@185603 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arm/neon.ml')
| -rw-r--r-- | gcc/config/arm/neon.ml | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/gcc/config/arm/neon.ml b/gcc/config/arm/neon.ml index 85eb5ec42f2..677468876af 100644 --- a/gcc/config/arm/neon.ml +++ b/gcc/config/arm/neon.ml @@ -234,7 +234,8 @@ type features = cases. The function supplied must return the integer to be written into the testcase for the argument number (0-based) supplied to it. *) | Const_valuator of (int -> int) - | Fixed_return_reg + | Fixed_vector_reg + | Fixed_core_reg exception MixedMode of elts * elts @@ -1009,7 +1010,8 @@ let ops = Vget_lane, [InfoWord; Disassembles_as [Use_operands [| Corereg; Corereg; Dreg |]]; - Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)], + Instruction_name ["vmov"; "fmrrd"]; Const_valuator (fun _ -> 0); + Fixed_core_reg], Use_operands [| Corereg; Qreg; Immed |], "vgetQ_lane", notype_2, [S64; U64]; @@ -1125,7 +1127,7 @@ let ops = notype_1, pf_su_8_64; Vget_low, [Instruction_name ["vmov"]; Disassembles_as [Use_operands [| Dreg; Dreg |]]; - Fixed_return_reg], + Fixed_vector_reg], Use_operands [| Dreg; Qreg |], "vget_low", notype_1, pf_su_8_32; Vget_low, [No_op], |