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| author | Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> | 2012-11-30 15:17:48 +0000 |
|---|---|---|
| committer | Greta Yorsh <gretay@gcc.gnu.org> | 2012-11-30 15:17:48 +0000 |
| commit | 148413a4ebf0e53a95183aa3bdf6eff032cbaa56 (patch) | |
| tree | f4c3e4e7c9790d885a8910d5dd67b7e13d5b0b06 /gcc/config/arm/arm1020e.md | |
| parent | 5ba5e8ecc32c6c453890e97ccf94b23fcf5506fd (diff) | |
| download | gcc-148413a4ebf0e53a95183aa3bdf6eff032cbaa56.tar.gz | |
For attribute named "type", subdivide "alu" into "alu_reg" and "simple_alu_imm".
Set type attribute as appropriate in RTL patterns with immediate operands.
Update pipeline descriptions to use the new values of type attribute.
gcc/
2012-11-30 Ramana Radhakrishnan <Ramana.Radhakrishnan@arm.com>
Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.md (type): Subdivide "alu" into "alu_reg"
and "simple_alu_imm".
(core_cycles): Use new names.
(arm_addsi3): Set type of patterns to use to alu_reg and simple_alu_imm.
(addsi3_compare0, addsi3_compare0_scratch): Likewise.
(addsi3_compare_op1, addsi3_compare_op2, compare_addsi2_op0): Likewise.
(compare_addsi2_op1, arm_subsi3_insn, subsi3_compare0): Likewise.
(subsi3_compare, arm_decscc,arm_andsi3_insn): Likewise.
(thumb1_andsi3_insn, andsi3_compare0_scratch): Likewise.
(zeroextractsi_compare0_scratch,iorsi3_insn,iorsi3_compare0): Likewise.
(iorsi3_compare0_scratch, arm_xorsi3, thumb1_xorsi3_insn): Likewise.
(xorsi3_compare0, xorsi3_compare0_scratch): Likewise.
(thumb1_zero_extendhisi2,arm_zero_extendhisi2_v6): Likewise.
(thumb1_zero_extendqisi2_v, arm_zero_extendqisi2_v6): Likewise.
(thumb1_extendhisi2, arm_extendqisi_v6): Likewise.
(thumb1_extendqisi2, arm_movsi_insn): Likewise.
(movsi_compare0, movhi_insn_arch4, movhi_bytes): Likewise.
(arm_movqi_insn, thumb1_movqi_insn, arm_cmpsi_insn): Likewise.
(movsicc_insn, if_plus_move, if_move_plus): Likewise.
* config/arm/neon.md (neon_mov<mode>/VDX): Likewise.
(neon_mov<mode>/VQXMOV): Likewise.
* config/arm/arm1020e.md (1020alu_op): Likewise.
* config/arm/fmp626.md (mp626_alu_op): Likewise.
* config/arm/fa726te.md (726te_alu_op): Likewise.
* config/arm/fa626te.md (626te_alu_op): Likewise.
* config/arm/fa606te.md (606te_alu_op): Likewise.
* config/arm/fa526.md (526_alu_op): Likewise.
* config/arm/cortex-r4.md (cortex_r4_alu, cortex_r4_mov): Likewise.
* config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
* config/arm/cortex-a9.md (cprtex_a9_dp): Likewise.
* config/arm/cortex-a8.md (cortex_a8_alu, cortex_a8_mov): Likewise.
* config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
* config/arm/cortex-a15.md (cortex_a15_alu): Likewise.
* config/arm/arm926ejs.md (9_alu_op): Likewise.
* config/arm/arm1136jfs.md (11_alu_op): Likewise.
* config/arm/arm1026ejs.md (alu_op): Likewise.
Co-Authored-By: Greta Yorsh <greta.yorsh@arm.com>
From-SVN: r193996
Diffstat (limited to 'gcc/config/arm/arm1020e.md')
| -rw-r--r-- | gcc/config/arm/arm1020e.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/arm/arm1020e.md b/gcc/config/arm/arm1020e.md index 280af12f932..3d3ff23e7c6 100644 --- a/gcc/config/arm/arm1020e.md +++ b/gcc/config/arm/arm1020e.md @@ -66,7 +66,7 @@ ;; ALU operations with no shifted operand (define_insn_reservation "1020alu_op" 1 (and (eq_attr "tune" "arm1020e,arm1022e") - (eq_attr "type" "alu")) + (eq_attr "type" "alu_reg,simple_alu_imm")) "1020a_e,1020a_m,1020a_w") ;; ALU operations with a shift-by-constant operand |