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author | Yvan Roux <yvan.roux@linaro.org> | 2015-12-03 19:48:09 +0100 |
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committer | Linaro Code Review <review@review.linaro.org> | 2015-12-07 16:17:29 +0000 |
commit | 220720af49790ed4b61079a0c8a99e33c7ae9fc9 (patch) | |
tree | 1b169b477c573239d2760431a9cf1cd468398124 /gcc/config/arm/arm.md | |
parent | d812fa17df6812c5686bdf95ae12889f3b5ec6d6 (diff) | |
download | gcc-220720af49790ed4b61079a0c8a99e33c7ae9fc9.tar.gz |
gcc/
Backport from trunk r230222.
2015-11-12 Renlin Li <renlin.li@arm.com>
* config/arm/arm.md (addsi3_compare_op2): Make the order of
assembly pattern consistent with constraint order.
Change-Id: Ic6ab8fc2f06b420d4ce51d35727891ad135c3066
Diffstat (limited to 'gcc/config/arm/arm.md')
-rw-r--r-- | gcc/config/arm/arm.md | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 4aa7234a4f5..84b04156cbe 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -747,8 +747,8 @@ "TARGET_32BIT" "@ adds%?\\t%0, %1, %2 - adds%?\\t%0, %1, %2 - subs%?\\t%0, %1, #%n2" + subs%?\\t%0, %1, #%n2 + adds%?\\t%0, %1, %2" [(set_attr "conds" "set") (set_attr "type" "alus_imm,alus_imm,alus_sreg")] ) |