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| author | bonzini <bonzini@138bc75d-0d04-0410-961f-82ee72b054a4> | 2009-10-28 16:44:08 +0000 |
|---|---|---|
| committer | bonzini <bonzini@138bc75d-0d04-0410-961f-82ee72b054a4> | 2009-10-28 16:44:08 +0000 |
| commit | 408b7ae5e1450ca90901caf1ee4f95ab90a8a7a6 (patch) | |
| tree | 9e6ff3abfa058335becbd815e1cda2a93e6197d9 /gcc/config/arm/arm.md | |
| parent | d508766fcb7a88e59bc2a0d94a2150bff9c6ea6f (diff) | |
| download | gcc-408b7ae5e1450ca90901caf1ee4f95ab90a8a7a6.tar.gz | |
2009-10-28 Paolo Bonzini <bonzini@gnu.org>
PR rtl-optimization/39715
* config/arm/arm.md (cstoresi4): Use gen_cstoresi_ltu_thumb1.
(gen_cstoresi_ltu_thumb1): New splitter.
2009-10-28 Paolo Bonzini <bonzini@gnu.org>
PR rtl-optimization/39715
* gcc.target/arm/thumb-ltu.c: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@153678 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arm/arm.md')
| -rw-r--r-- | gcc/config/arm/arm.md | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index fff41d896ca..d718c590434 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -8068,15 +8068,13 @@ if (!thumb1_cmp_operand (op3, SImode)) op3 = force_reg (SImode, op3); scratch = gen_reg_rtx (SImode); - emit_insn (gen_cstoresi_nltu_thumb1 (scratch, operands[2], op3)); - emit_insn (gen_negsi2 (operands[0], scratch)); + emit_insn (gen_cstoresi_ltu_thumb1 (operands[0], operands[2], op3)); break; case GTU: op3 = force_reg (SImode, operands[3]); scratch = gen_reg_rtx (SImode); - emit_insn (gen_cstoresi_nltu_thumb1 (scratch, op3, operands[2])); - emit_insn (gen_negsi2 (operands[0], scratch)); + emit_insn (gen_cstoresi_ltu_thumb1 (operands[0], op3, operands[2])); break; /* No good sequences for GT, LT. */ @@ -8160,6 +8158,7 @@ [(set_attr "length" "4")] ) +;; Used as part of the expansion of thumb ltu and gtu sequences (define_insn "cstoresi_nltu_thumb1" [(set (match_operand:SI 0 "s_register_operand" "=l,l") (neg:SI (ltu:SI (match_operand:SI 1 "s_register_operand" "l,*h") @@ -8169,6 +8168,20 @@ [(set_attr "length" "4")] ) +(define_insn_and_split "cstoresi_ltu_thumb1" + [(set (match_operand:SI 0 "s_register_operand" "=l,l") + (ltu:SI (match_operand:SI 1 "s_register_operand" "l,*h") + (match_operand:SI 2 "thumb1_cmp_operand" "lI*h,*r")))] + "TARGET_THUMB1" + "#" + "TARGET_THUMB1" + [(set (match_dup 3) + (neg:SI (ltu:SI (match_dup 1) (match_dup 2)))) + (set (match_dup 0) (neg:SI (match_dup 3)))] + "operands[3] = gen_reg_rtx (SImode);" + [(set_attr "length" "4")] +) + ;; Used as part of the expansion of thumb les sequence. (define_insn "thumb1_addsi3_addgeu" [(set (match_operand:SI 0 "s_register_operand" "=l") |