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authoralalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4>2015-02-05 16:58:58 +0000
committeralalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4>2015-02-05 16:58:58 +0000
commitdc44066f660f9b7d9de7a71ec37a9634fa6b1752 (patch)
tree3af2ded9211f056e18c3f33bceaa37292a578673 /gcc/config/arm/arm.h
parent7493d3493b787714e244fa2ac8ea2ca3a04cf499 (diff)
downloadgcc-dc44066f660f9b7d9de7a71ec37a9634fa6b1752.tar.gz
[ARM] __ARM_FP & __ARM_NEON_FP defined when -march=armv7-m
gcc/: * config/arm/arm.h (TARGET_NEON_FP): Removed conditional definition, define to zero if !TARGET_NEON. (TARGET_CPU_CPP_BUILTINS): Added second condition before defining __ARM_FP macro. gcc/testsuite/: * gcc.target/arm/macro_defs0.c: New test. * gcc.target/arm/macro_defs1.c: New test. * gcc.target/arm/macro_defs2.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220456 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arm/arm.h')
-rw-r--r--gcc/config/arm/arm.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 831d6e17d1f..297dfe1ae67 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -2360,17 +2360,17 @@ extern int making_const_table;
point types. Where bit 1 indicates 16-bit support, bit 2 indicates
32-bit support, bit 3 indicates 64-bit support. */
#define TARGET_ARM_FP \
- (TARGET_VFP_SINGLE ? 4 \
- : (TARGET_VFP_DOUBLE ? (TARGET_FP16 ? 14 : 12) : 0))
+ (!TARGET_SOFT_FLOAT ? (TARGET_VFP_SINGLE ? 4 \
+ : (TARGET_VFP_DOUBLE ? (TARGET_FP16 ? 14 : 12) : 0)) \
+ : 0)
/* Set as a bit mask indicating the available widths of floating point
types for hardware NEON floating point. This is the same as
TARGET_ARM_FP without the 64-bit bit set. */
-#ifdef TARGET_NEON
-#define TARGET_NEON_FP \
- (TARGET_ARM_FP & (0xff ^ 0x08))
-#endif
+#define TARGET_NEON_FP \
+ (TARGET_NEON ? (TARGET_ARM_FP & (0xff ^ 0x08)) \
+ : 0)
/* The maximum number of parallel loads or stores we support in an ldm/stm
instruction. */