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| author | Richard Sandiford <richard.sandiford@linaro.org> | 2017-11-05 17:19:35 +0000 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@linaro.org> | 2017-11-05 17:19:35 +0000 |
| commit | 648f8fc59b2cc39abd24f4c22388b346cdebcc31 (patch) | |
| tree | 3a07eccc4c22b265261edd75c9ec3910d9c626f5 /gcc/config/arm/arm.h | |
| parent | 7bef5b82e4109778a0988d20e19e1ed29dadd835 (diff) | |
| parent | 8c089b5c15a7b35644750ca393f1e66071ad9aa9 (diff) | |
| download | gcc-648f8fc59b2cc39abd24f4c22388b346cdebcc31.tar.gz | |
Merge trunk into sve
Diffstat (limited to 'gcc/config/arm/arm.h')
| -rw-r--r-- | gcc/config/arm/arm.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 336db4b042d..65d6db4d086 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -210,6 +210,11 @@ extern tree arm_fp16_type_node; /* FPU supports ARMv8.1 Adv.SIMD extensions. */ #define TARGET_NEON_RDMA (TARGET_NEON && arm_arch8_1) +/* Supports for Dot Product AdvSIMD extensions. */ +#define TARGET_DOTPROD (TARGET_NEON \ + && bitmap_bit_p (arm_active_target.isa, \ + isa_bit_dotprod)) + /* FPU supports the floating point FP16 instructions for ARMv8.2 and later. */ #define TARGET_VFP_FP16INST \ (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP5 && arm_fp16_inst) @@ -1248,7 +1253,7 @@ enum reg_class couldn't convert a direct call into an indirect one. */ #define CALLER_INTERWORKING_SLOT_SIZE \ (TARGET_CALLER_INTERWORKING \ - && maybe_nonzero (crtl->outgoing_args_size) \ + && may_ne (crtl->outgoing_args_size, 0) \ ? UNITS_PER_WORD : 0) /* If we generate an insn to push BYTES bytes, |