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| author | mwahab <mwahab@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-08-12 15:42:31 +0000 |
|---|---|---|
| committer | mwahab <mwahab@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-08-12 15:42:31 +0000 |
| commit | 5fa256c6e88a0a90810022bfcf6e058157b9838d (patch) | |
| tree | c4bcab68250694f9a4802c41927ff4cfcc7ea31d /gcc/config/arm/arm.h | |
| parent | a95f42c2fb70cb574049304905f556e9f1fdfc7e (diff) | |
| download | gcc-5fa256c6e88a0a90810022bfcf6e058157b9838d.tar.gz | |
* config/arm/arm-fpus.def: Replace booleans with feature flags.
Update comment.
* config/arm/arm.c (ARM_FPU): Update macro.
* config/arm/arm.h (TARGET_NEON_FP16): Update feature test.
(TARGET_FP16): Likewise.
(TARGET_CRYPTO): Likewise.
(TARGET_NEON): Likewise.
(struct arm_fpu_desc): Remove fields neon, fp16 and crypto. Add
field features.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@226821 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/arm/arm.h')
| -rw-r--r-- | gcc/config/arm/arm.h | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index f49eb488c7a..eee9e8b551f 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -193,11 +193,13 @@ extern void (*arm_lang_output_object_attributes_hook)(void); #define TARGET_VFP_DOUBLE (TARGET_VFP && arm_fpu_desc->regs != VFP_REG_SINGLE) /* FPU supports half-precision floating-point with NEON element load/store. */ -#define TARGET_NEON_FP16 \ - (TARGET_VFP && arm_fpu_desc->neon && arm_fpu_desc->fp16) +#define TARGET_NEON_FP16 \ + (TARGET_VFP \ + && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON | FPU_FL_FP16)) /* FPU supports VFP half-precision floating-point. */ -#define TARGET_FP16 (TARGET_VFP && arm_fpu_desc->fp16) +#define TARGET_FP16 \ + (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_FP16)) /* FPU supports fused-multiply-add operations. */ #define TARGET_FMA (TARGET_VFP && arm_fpu_desc->rev >= 4) @@ -206,14 +208,18 @@ extern void (*arm_lang_output_object_attributes_hook)(void); #define TARGET_FPU_ARMV8 (TARGET_VFP && arm_fpu_desc->rev >= 8) /* FPU supports Crypto extensions. */ -#define TARGET_CRYPTO (TARGET_VFP && arm_fpu_desc->crypto) +#define TARGET_CRYPTO \ + (TARGET_VFP && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_CRYPTO)) + /* FPU supports Neon instructions. The setting of this macro gets revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT and TARGET_HARD_FLOAT to ensure that NEON instructions are available. */ -#define TARGET_NEON (TARGET_32BIT && TARGET_HARD_FLOAT \ - && TARGET_VFP && arm_fpu_desc->neon) +#define TARGET_NEON \ + (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP \ + && ARM_FPU_FSET_HAS (arm_fpu_desc->features, FPU_FL_NEON)) + /* Q-bit is present. */ #define TARGET_ARM_QBIT_P(flags) \ @@ -353,9 +359,7 @@ extern const struct arm_fpu_desc enum arm_fp_model model; int rev; enum vfp_reg_type regs; - int neon; - int fp16; - int crypto; + arm_fpu_feature_set features; } *arm_fpu_desc; /* Which floating point hardware to schedule for. */ |