gcc/

	* config/arm/arm-cores.def (cortex-m7): Add flag FL_NO_VOLATILE_CE.
	* config/arm/arm-protos.h (FL_NO_VOLATILE_CE): New flag.
	(arm_arch_no_volatile_ce): Declare new global variable.
	* config/arm/arm.c (arm_arch_no_volatile_ce): New global variable.
	(arm_option_override): Assign value to arm_arch_no_volatile_ce.
	* config/arm/arm.h (arm_arch_no_volatile_ce): Declare it.
	(TARGET_NO_VOLATILE_CE): New macro.
	* config/arm/arm.md (arm_comparison_operator): Disabled if not allow
	volatile memory access in IT block

gcc/testsuite/
	* gcc.target/arm/no-volatile-in-it.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@220999 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 6 insertions, 0 deletions

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 297dfe1ae67..8c10ea3c905 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -383,6 +383,9 @@ extern void (*arm_lang_output_object_attributes_hook)(void);
 #define TARGET_IDIV		((TARGET_ARM && arm_arch_arm_hwdiv) \
 				 || (TARGET_THUMB2 && arm_arch_thumb_hwdiv))
 
+/* Nonzero if disallow volatile memory access in IT block.  */
+#define TARGET_NO_VOLATILE_CE		(arm_arch_no_volatile_ce)
+
 /* Should NEON be used for 64-bits bitops.  */
 #define TARGET_PREFER_NEON_64BITS (prefer_neon_for_64bits)
 
@@ -568,6 +571,9 @@ extern int arm_arch_arm_hwdiv;
 /* Nonzero if chip supports integer division instruction in Thumb mode.  */
 extern int arm_arch_thumb_hwdiv;
 
+/* Nonzero if chip disallows volatile memory access in IT block.  */
+extern int arm_arch_no_volatile_ce;
+
 /* Nonzero if we should use Neon to handle 64-bits operations rather
    than core registers.  */
 extern int prefer_neon_for_64bits;