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authorbstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4>2010-01-21 07:20:48 +0000
committerbstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4>2010-01-21 07:20:48 +0000
commit1869ca576befbe5457337f88ec2e183aa66eb96f (patch)
tree5a7be8ba6dc1abd3f95a537fbc5e0ad6a7afb4ef /gcc/config/alpha/predicates.md
parent63b82f0a74f7ec778b00401a1a273c9df747b758 (diff)
downloadgcc-1869ca576befbe5457337f88ec2e183aa66eb96f.tar.gz
2010-01-21 Basile Starynkevitch <basile@starynkevitch.net>
MELT branch merged with trunk rev 156107 git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@156108 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/alpha/predicates.md')
-rw-r--r--gcc/config/alpha/predicates.md46
1 files changed, 36 insertions, 10 deletions
diff --git a/gcc/config/alpha/predicates.md b/gcc/config/alpha/predicates.md
index b52d9dce028..0852f692998 100644
--- a/gcc/config/alpha/predicates.md
+++ b/gcc/config/alpha/predicates.md
@@ -439,13 +439,11 @@
(match_code "mem"))
{
rtx base;
+ int offset;
if (MEM_ALIGN (op) >= 32)
return 1;
- if (mode == CQImode)
- return 0;
-
op = XEXP (op, 0);
/* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo)
@@ -453,14 +451,29 @@
if (reload_in_progress
&& GET_CODE (op) == PLUS
&& GET_CODE (XEXP (op, 0)) == PLUS)
- base = XEXP (XEXP (op, 0), 0);
+ {
+ base = XEXP (XEXP (op, 0), 0);
+ offset = INTVAL (XEXP (op, 1));
+ }
else
{
if (! memory_address_p (mode, op))
return 0;
- base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
+ if (GET_CODE (op) == PLUS)
+ {
+ base = XEXP (op, 0);
+ offset = INTVAL (XEXP (op, 1));
+ }
+ else
+ {
+ base = op;
+ offset = 0;
+ }
}
+ if (offset % GET_MODE_SIZE (mode))
+ return 0;
+
return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) >= 32);
})
@@ -471,13 +484,11 @@
(match_code "mem"))
{
rtx base;
+ int offset;
if (MEM_ALIGN (op) >= 32)
return 0;
- if (mode == CQImode)
- return 1;
-
op = XEXP (op, 0);
/* LEGITIMIZE_RELOAD_ADDRESS creates (plus (plus reg const_hi) const_lo)
@@ -485,14 +496,29 @@
if (reload_in_progress
&& GET_CODE (op) == PLUS
&& GET_CODE (XEXP (op, 0)) == PLUS)
- base = XEXP (XEXP (op, 0), 0);
+ {
+ base = XEXP (XEXP (op, 0), 0);
+ offset = INTVAL (XEXP (op, 1));
+ }
else
{
if (! memory_address_p (mode, op))
return 0;
- base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
+ if (GET_CODE (op) == PLUS)
+ {
+ base = XEXP (op, 0);
+ offset = INTVAL (XEXP (op, 1));
+ }
+ else
+ {
+ base = op;
+ offset = 0;
+ }
}
+ if (offset % GET_MODE_SIZE (mode))
+ return 1;
+
return (REG_P (base) && REGNO_POINTER_ALIGN (REGNO (base)) < 32);
})