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authorrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2011-11-15 23:43:08 +0000
committerrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>2011-11-15 23:43:08 +0000
commit51c750d8afd0bf1136f63fdd4aa887c7f57b61de (patch)
treec0fb259e8e28bd8177c369c261835664ce36ff6b /gcc/config/alpha/predicates.md
parent8683d45d453f44b362fa9e640ca6fde7b3df678e (diff)
downloadgcc-51c750d8afd0bf1136f63fdd4aa887c7f57b61de.tar.gz
alpha: Convert to atomic optabs.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181395 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/alpha/predicates.md')
-rw-r--r--gcc/config/alpha/predicates.md5
1 files changed, 5 insertions, 0 deletions
diff --git a/gcc/config/alpha/predicates.md b/gcc/config/alpha/predicates.md
index c1e3115aead..598742f81e7 100644
--- a/gcc/config/alpha/predicates.md
+++ b/gcc/config/alpha/predicates.md
@@ -623,3 +623,8 @@
(ior (match_operand 0 "register_operand")
(and (match_test "TARGET_BWX")
(match_operand 0 "memory_operand"))))
+
+;; Accept a memory whose address is only a register.
+(define_predicate "mem_noofs_operand"
+ (and (match_code "mem")
+ (match_code "reg" "0")))