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author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-04-27 14:47:57 +0000 |
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committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-04-27 14:47:57 +0000 |
commit | 0d96cd2ba4ca5bf0e1681d683bd566b940fe1cea (patch) | |
tree | 13f1f56c69e4fb85cba6ff3f0491b57313c3d470 /gcc/config/alpha/predicates.md | |
parent | 83a20bafd7318b3a7cdd89402c3e74475c547506 (diff) | |
download | gcc-0d96cd2ba4ca5bf0e1681d683bd566b940fe1cea.tar.gz |
* config/alpha/predicates.md (aligned_memory_operand): Mark
as define_special_predicate.
(unaligned_memory_operand, normal_memory_operand): Likewise.
(reg_or_unaligned_mem_operand): Remove.
(any_memory_operand): Match the documentation and check for
non-renumbered pseudos during reload.
* config/alpha/alpha.c (alpha_secondary_reload): Rename from
alpha_secondary_reload_class, update to new interface, make static.
Handle CQImode like HImode. Remove FP subreg check.
(alpha_expand_mov): Use replace_equiv_address.
(alpha_expand_mov_nobwx): Use any_memory_operand.
(TARGET_SECONDARY_RELOAD): New.
* config/alpha/alpha.h (SECONDARY_INPUT_RELOAD_CLASS): Remove.
(SECONDARY_OUTPUT_RELOAD_CLASS): Remove.
* config/alpha/sync.md (I12MODE, I48MODE, modesuffix): Move ...
* config/alpha/alpha.md: ... here.
(RELOAD12, reloadmode): New.
(movcqi): New.
(reload_in<RELOAD12>): Macro-ize from reload_inqi, reload_inhi.
Don't handle the aligned case here.
(reload_out<RELOAD12>): Macro-ize from reload_outqi, reload_outhi.
(reload_in<I12MODE>_aligned): Macro-ize from reload_inqi_help,
reload_inhi_help. Don't expect a scratch register.
(reload_out<I12MODE>_aligned): Macro-ize from reload_outqi_help,
reload_outhi_help.
* config/alpha/alpha-protos.h (alpha_secondary_reload_class): Remove.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@124220 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/alpha/predicates.md')
-rw-r--r-- | gcc/config/alpha/predicates.md | 32 |
1 files changed, 21 insertions, 11 deletions
diff --git a/gcc/config/alpha/predicates.md b/gcc/config/alpha/predicates.md index 0b2c22f16dd..a4e9c9e5abc 100644 --- a/gcc/config/alpha/predicates.md +++ b/gcc/config/alpha/predicates.md @@ -434,7 +434,7 @@ ;; use recog during reload, so pretending these codes are accepted ;; pessimizes things a tad. -(define_predicate "aligned_memory_operand" +(define_special_predicate "aligned_memory_operand" (ior (match_test "op = resolve_reload_operand (op), 0") (match_code "mem")) { @@ -462,7 +462,7 @@ ;; Similar, but return 1 if OP is a MEM which is not alignable. -(define_predicate "unaligned_memory_operand" +(define_special_predicate "unaligned_memory_operand" (ior (match_test "op = resolve_reload_operand (op), 0") (match_code "mem")) { @@ -489,20 +489,30 @@ }) ;; Return 1 if OP is any memory location. During reload a pseudo matches. -(define_predicate "any_memory_operand" - (ior (match_code "mem,reg") - (and (match_code "subreg") - (match_test "GET_CODE (SUBREG_REG (op)) == REG")))) +(define_special_predicate "any_memory_operand" + (match_code "mem,reg,subreg") +{ + if (GET_CODE (op) == SUBREG) + op = SUBREG_REG (op); -;; Return 1 if OP is either a register or an unaligned memory location. -(define_predicate "reg_or_unaligned_mem_operand" - (ior (match_operand 0 "register_operand") - (match_operand 0 "unaligned_memory_operand"))) + if (MEM_P (op)) + return true; + if (reload_in_progress && REG_P (op)) + { + unsigned regno = REGNO (op); + if (HARD_REGISTER_NUM_P (regno)) + return false; + else + return reg_renumber[regno] < 0; + } + + return false; +}) ;; Return 1 is OP is a memory location that is not a reference ;; (using an AND) to an unaligned location. Take into account ;; what reload will do. -(define_predicate "normal_memory_operand" +(define_special_predicate "normal_memory_operand" (ior (match_test "op = resolve_reload_operand (op), 0") (and (match_code "mem") (match_test "GET_CODE (XEXP (op, 0)) != AND")))) |