[2/77] Add an E_ prefix to case statements

All case statements need to be updated to use the prefixed names,
since the unprefixed names will eventually not be integer constant
expressions.  This patch does a mechanical substitution over the whole
codebase.

2017-08-30  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_std_type):
	Prefix mode names with E_ in case statements.
	* config/aarch64/aarch64-elf.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
	* config/aarch64/aarch64.c (aarch64_split_simd_combine): Likewise.
	(aarch64_split_simd_move): Likewise.
	(aarch64_gen_storewb_pair): Likewise.
	(aarch64_gen_loadwb_pair): Likewise.
	(aarch64_gen_store_pair): Likewise.
	(aarch64_gen_load_pair): Likewise.
	(aarch64_get_condition_code_1): Likewise.
	(aarch64_constant_pool_reload_icode): Likewise.
	(get_rsqrte_type): Likewise.
	(get_rsqrts_type): Likewise.
	(get_recpe_type): Likewise.
	(get_recps_type): Likewise.
	(aarch64_gimplify_va_arg_expr): Likewise.
	(aarch64_simd_container_mode): Likewise.
	(aarch64_emit_load_exclusive): Likewise.
	(aarch64_emit_store_exclusive): Likewise.
	(aarch64_expand_compare_and_swap): Likewise.
	(aarch64_gen_atomic_cas): Likewise.
	(aarch64_emit_bic): Likewise.
	(aarch64_emit_atomic_swap): Likewise.
	(aarch64_emit_atomic_load_op): Likewise.
	(aarch64_evpc_trn): Likewise.
	(aarch64_evpc_uzp): Likewise.
	(aarch64_evpc_zip): Likewise.
	(aarch64_evpc_ext): Likewise.
	(aarch64_evpc_rev): Likewise.
	(aarch64_evpc_dup): Likewise.
	(aarch64_gen_ccmp_first): Likewise.
	(aarch64_gen_ccmp_next): Likewise.
	* config/alpha/alpha.c (alpha_scalar_mode_supported_p): Likewise.
	(alpha_emit_xfloating_libcall): Likewise.
	(emit_insxl): Likewise.
	(alpha_arg_type): Likewise.
	* config/arc/arc.c (arc_vector_mode_supported_p): Likewise.
	(arc_preferred_simd_mode): Likewise.
	(arc_secondary_reload): Likewise.
	(get_arc_condition_code): Likewise.
	(arc_print_operand): Likewise.
	(arc_legitimate_constant_p): Likewise.
	* config/arc/arc.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
	* config/arc/arc.md (casesi_load): Likewise.
	(casesi_compact_jump): Likewise.
	* config/arc/predicates.md (proper_comparison_operator): Likewise.
	(cc_use_register): Likewise.
	* config/arm/aout.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
	* config/arm/arm-builtins.c (arm_simd_builtin_std_type): Likewise.
	(arm_init_iwmmxt_builtins): Likewise.
	* config/arm/arm.c (thumb1_size_rtx_costs): Likewise.
	(neon_expand_vector_init): Likewise.
	(arm_attr_length_move_neon): Likewise.
	(maybe_get_arm_condition_code): Likewise.
	(arm_emit_vector_const): Likewise.
	(arm_preferred_simd_mode): Likewise.
	(arm_output_iwmmxt_tinsr): Likewise.
	(thumb1_output_casesi): Likewise.
	(thumb2_output_casesi): Likewise.
	(arm_emit_load_exclusive): Likewise.
	(arm_emit_store_exclusive): Likewise.
	(arm_expand_compare_and_swap): Likewise.
	(arm_evpc_neon_vuzp): Likewise.
	(arm_evpc_neon_vzip): Likewise.
	(arm_evpc_neon_vrev): Likewise.
	(arm_evpc_neon_vtrn): Likewise.
	(arm_evpc_neon_vext): Likewise.
	(arm_validize_comparison): Likewise.
	* config/arm/neon.md (neon_vc<cmp_op><mode>): Likewise.
	* config/avr/avr-c.c (avr_resolve_overloaded_builtin): Likewise.
	* config/avr/avr.c (avr_rtx_costs_1): Likewise.
	* config/c6x/c6x.c (c6x_vector_mode_supported_p): Likewise.
	(c6x_preferred_simd_mode): Likewise.
	* config/epiphany/epiphany.c (get_epiphany_condition_code): Likewise.
	(epiphany_rtx_costs): Likewise.
	* config/epiphany/predicates.md (proper_comparison_operator):
	Likewise.
	* config/frv/frv.c (condexec_memory_operand): Likewise.
	(frv_emit_move): Likewise.
	(output_move_single): Likewise.
	(output_condmove_single): Likewise.
	(frv_hard_regno_mode_ok): Likewise.
	(frv_matching_accg_mode): Likewise.
	* config/h8300/h8300.c (split_adds_subs): Likewise.
	(h8300_rtx_costs): Likewise.
	(h8300_print_operand): Likewise.
	(compute_mov_length): Likewise.
	(output_logical_op): Likewise.
	(compute_logical_op_length): Likewise.
	(compute_logical_op_cc): Likewise.
	(h8300_shift_needs_scratch_p): Likewise.
	(output_a_shift): Likewise.
	(compute_a_shift_length): Likewise.
	(compute_a_shift_cc): Likewise.
	(expand_a_rotate): Likewise.
	(output_a_rotate): Likewise.
	* config/i386/i386.c (classify_argument): Likewise.
	(function_arg_advance_32): Likewise.
	(function_arg_32): Likewise.
	(function_arg_64): Likewise.
	(function_value_64): Likewise.
	(ix86_gimplify_va_arg): Likewise.
	(ix86_legitimate_constant_p): Likewise.
	(put_condition_code): Likewise.
	(split_double_mode): Likewise.
	(ix86_avx256_split_vector_move_misalign): Likewise.
	(ix86_expand_vector_logical_operator): Likewise.
	(ix86_split_idivmod): Likewise.
	(ix86_expand_adjust_ufix_to_sfix_si): Likewise.
	(ix86_build_const_vector): Likewise.
	(ix86_build_signbit_mask): Likewise.
	(ix86_match_ccmode): Likewise.
	(ix86_cc_modes_compatible): Likewise.
	(ix86_expand_branch): Likewise.
	(ix86_expand_sse_cmp): Likewise.
	(ix86_expand_sse_movcc): Likewise.
	(ix86_expand_int_sse_cmp): Likewise.
	(ix86_expand_vec_perm_vpermi2): Likewise.
	(ix86_expand_vec_perm): Likewise.
	(ix86_expand_sse_unpack): Likewise.
	(ix86_expand_int_addcc): Likewise.
	(ix86_split_to_parts): Likewise.
	(ix86_vectorize_builtin_gather): Likewise.
	(ix86_vectorize_builtin_scatter): Likewise.
	(avx_vpermilp_parallel): Likewise.
	(inline_memory_move_cost): Likewise.
	(ix86_tieable_integer_mode_p): Likewise.
	(x86_maybe_negate_const_int): Likewise.
	(ix86_expand_vector_init_duplicate): Likewise.
	(ix86_expand_vector_init_one_nonzero): Likewise.
	(ix86_expand_vector_init_one_var): Likewise.
	(ix86_expand_vector_init_concat): Likewise.
	(ix86_expand_vector_init_interleave): Likewise.
	(ix86_expand_vector_init_general): Likewise.
	(ix86_expand_vector_set): Likewise.
	(ix86_expand_vector_extract): Likewise.
	(emit_reduc_half): Likewise.
	(ix86_emit_i387_round): Likewise.
	(ix86_mangle_type): Likewise.
	(ix86_expand_round_sse4): Likewise.
	(expand_vec_perm_blend): Likewise.
	(canonicalize_vector_int_perm): Likewise.
	(ix86_expand_vec_one_operand_perm_avx512): Likewise.
	(expand_vec_perm_1): Likewise.
	(expand_vec_perm_interleave3): Likewise.
	(expand_vec_perm_even_odd_pack): Likewise.
	(expand_vec_perm_even_odd_1): Likewise.
	(expand_vec_perm_broadcast_1): Likewise.
	(ix86_vectorize_vec_perm_const_ok): Likewise.
	(ix86_expand_vecop_qihi): Likewise.
	(ix86_expand_mul_widen_hilo): Likewise.
	(ix86_expand_sse2_abs): Likewise.
	(ix86_expand_pextr): Likewise.
	(ix86_expand_pinsr): Likewise.
	(ix86_preferred_simd_mode): Likewise.
	(ix86_simd_clone_compute_vecsize_and_simdlen): Likewise.
	* config/i386/sse.md (*andnot<mode>3): Likewise.
	(<mask_codefor><code><mode>3<mask_name>): Likewise.
	(*<code><mode>3): Likewise.
	* config/ia64/ia64.c (ia64_expand_vecint_compare): Likewise.
	(ia64_expand_atomic_op): Likewise.
	(ia64_arg_type): Likewise.
	(ia64_mode_to_int): Likewise.
	(ia64_scalar_mode_supported_p): Likewise.
	(ia64_vector_mode_supported_p): Likewise.
	(expand_vec_perm_broadcast): Likewise.
	* config/iq2000/iq2000.c (iq2000_move_1word): Likewise.
	(iq2000_function_arg_advance): Likewise.
	(iq2000_function_arg): Likewise.
	* config/m32c/m32c.c (m32c_preferred_reload_class): Likewise.
	* config/m68k/m68k.c (output_dbcc_and_branch): Likewise.
	(m68k_libcall_value): Likewise.
	(m68k_function_value): Likewise.
	(sched_attr_op_type): Likewise.
	* config/mcore/mcore.c (mcore_output_move): Likewise.
	* config/microblaze/microblaze.c (microblaze_function_arg_advance):
	Likewise.
	(microblaze_function_arg): Likewise.
	* config/mips/mips.c (mips16_build_call_stub): Likewise.
	(mips_print_operand): Likewise.
	(mips_mode_ok_for_mov_fmt_p): Likewise.
	(mips_vector_mode_supported_p): Likewise.
	(mips_preferred_simd_mode): Likewise.
	(mips_expand_vpc_loongson_even_odd): Likewise.
	(mips_expand_vec_unpack): Likewise.
	(mips_expand_vi_broadcast): Likewise.
	(mips_expand_vector_init): Likewise.
	(mips_expand_vec_reduc): Likewise.
	(mips_expand_msa_cmp): Likewise.
	* config/mips/mips.md (casesi_internal_mips16_<mode>): Likewise.
	* config/mn10300/mn10300.c (mn10300_print_operand): Likewise.
	(cc_flags_for_mode): Likewise.
	* config/msp430/msp430.c (msp430_print_operand): Likewise.
	* config/nds32/nds32-md-auxiliary.c (nds32_mem_format): Likewise.
	(nds32_output_casesi_pc_relative): Likewise.
	* config/nds32/nds32.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
	* config/nvptx/nvptx.c (nvptx_ptx_type_from_mode): Likewise.
	(nvptx_gen_unpack): Likewise.
	(nvptx_gen_pack): Likewise.
	(nvptx_gen_shuffle): Likewise.
	(nvptx_gen_wcast): Likewise.
	(nvptx_preferred_simd_mode): Likewise.
	* config/pa/pa.c (pa_secondary_reload): Likewise.
	* config/pa/predicates.md (base14_operand): Likewise.
	* config/powerpcspe/powerpcspe-c.c
	(altivec_resolve_overloaded_builtin): Likewise.
	* config/powerpcspe/powerpcspe.c (rs6000_setup_reg_addr_masks):
	Likewise.
	(rs6000_preferred_simd_mode): Likewise.
	(output_vec_const_move): Likewise.
	(rs6000_expand_vector_extract): Likewise.
	(rs6000_split_vec_extract_var): Likewise.
	(reg_offset_addressing_ok_p): Likewise.
	(rs6000_legitimate_offset_address_p): Likewise.
	(rs6000_legitimize_address): Likewise.
	(rs6000_emit_set_const): Likewise.
	(rs6000_const_vec): Likewise.
	(rs6000_emit_move): Likewise.
	(spe_build_register_parallel): Likewise.
	(rs6000_darwin64_record_arg_recurse): Likewise.
	(swap_selector_for_mode): Likewise.
	(spe_init_builtins): Likewise.
	(paired_init_builtins): Likewise.
	(altivec_init_builtins): Likewise.
	(do_load_for_compare): Likewise.
	(rs6000_generate_compare): Likewise.
	(rs6000_expand_float128_convert): Likewise.
	(emit_load_locked): Likewise.
	(emit_store_conditional): Likewise.
	(rs6000_output_function_epilogue): Likewise.
	(rs6000_handle_altivec_attribute): Likewise.
	(rs6000_function_value): Likewise.
	(emit_fusion_gpr_load): Likewise.
	(emit_fusion_p9_load): Likewise.
	(emit_fusion_p9_store): Likewise.
	* config/powerpcspe/predicates.md (easy_fp_constant): Likewise.
	(fusion_gpr_mem_load): Likewise.
	(fusion_addis_mem_combo_load): Likewise.
	(fusion_addis_mem_combo_store): Likewise.
	* config/rs6000/predicates.md (easy_fp_constant): Likewise.
	(fusion_gpr_mem_load): Likewise.
	(fusion_addis_mem_combo_load): Likewise.
	(fusion_addis_mem_combo_store): Likewise.
	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
	Likewise.
	* config/rs6000/rs6000-string.c (do_load_for_compare): Likewise.
	* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Likewise.
	(rs6000_preferred_simd_mode): Likewise.
	(output_vec_const_move): Likewise.
	(rs6000_expand_vector_extract): Likewise.
	(rs6000_split_vec_extract_var): Likewise.
	(reg_offset_addressing_ok_p): Likewise.
	(rs6000_legitimate_offset_address_p): Likewise.
	(rs6000_legitimize_address): Likewise.
	(rs6000_emit_set_const): Likewise.
	(rs6000_const_vec): Likewise.
	(rs6000_emit_move): Likewise.
	(rs6000_darwin64_record_arg_recurse): Likewise.
	(swap_selector_for_mode): Likewise.
	(paired_init_builtins): Likewise.
	(altivec_init_builtins): Likewise.
	(rs6000_expand_float128_convert): Likewise.
	(emit_load_locked): Likewise.
	(emit_store_conditional): Likewise.
	(rs6000_output_function_epilogue): Likewise.
	(rs6000_handle_altivec_attribute): Likewise.
	(rs6000_function_value): Likewise.
	(emit_fusion_gpr_load): Likewise.
	(emit_fusion_p9_load): Likewise.
	(emit_fusion_p9_store): Likewise.
	* config/rx/rx.c (rx_gen_move_template): Likewise.
	(flags_from_mode): Likewise.
	* config/s390/predicates.md (s390_alc_comparison): Likewise.
	(s390_slb_comparison): Likewise.
	* config/s390/s390.c (s390_handle_vectorbool_attribute): Likewise.
	(s390_vector_mode_supported_p): Likewise.
	(s390_cc_modes_compatible): Likewise.
	(s390_match_ccmode_set): Likewise.
	(s390_canonicalize_comparison): Likewise.
	(s390_emit_compare_and_swap): Likewise.
	(s390_branch_condition_mask): Likewise.
	(s390_rtx_costs): Likewise.
	(s390_secondary_reload): Likewise.
	(__SECONDARY_RELOAD_CASE): Likewise.
	(s390_expand_cs): Likewise.
	(s390_preferred_simd_mode): Likewise.
	* config/s390/vx-builtins.md (vec_packsu_u<mode>): Likewise.
	* config/sh/sh.c (sh_print_operand): Likewise.
	(dump_table): Likewise.
	(sh_secondary_reload): Likewise.
	* config/sh/sh.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
	* config/sh/sh.md (casesi_worker_1): Likewise.
	(casesi_worker_2): Likewise.
	* config/sparc/predicates.md (icc_comparison_operator): Likewise.
	(fcc_comparison_operator): Likewise.
	* config/sparc/sparc.c (sparc_expand_move): Likewise.
	(emit_soft_tfmode_cvt): Likewise.
	(sparc_preferred_simd_mode): Likewise.
	(output_cbranch): Likewise.
	(sparc_print_operand): Likewise.
	(sparc_expand_vec_perm_bmask): Likewise.
	(vector_init_bshuffle): Likewise.
	* config/spu/spu.c (spu_scalar_mode_supported_p): Likewise.
	(spu_vector_mode_supported_p): Likewise.
	(spu_expand_insv): Likewise.
	(spu_emit_branch_or_set): Likewise.
	(spu_handle_vector_attribute): Likewise.
	(spu_builtin_splats): Likewise.
	(spu_builtin_extract): Likewise.
	(spu_builtin_promote): Likewise.
	(spu_expand_sign_extend): Likewise.
	* config/tilegx/tilegx.c (tilegx_scalar_mode_supported_p): Likewise.
	(tilegx_simd_int): Likewise.
	* config/tilepro/tilepro.c (tilepro_scalar_mode_supported_p): Likewise.
	(tilepro_simd_int): Likewise.
	* config/v850/v850.c (const_double_split): Likewise.
	(v850_print_operand): Likewise.
	(ep_memory_offset): Likewise.
	* config/vax/vax.c (vax_rtx_costs): Likewise.
	(vax_output_int_move): Likewise.
	(vax_output_int_add): Likewise.
	(vax_output_int_subtract): Likewise.
	* config/visium/predicates.md (visium_branch_operator): Likewise.
	* config/visium/visium.c (rtx_ok_for_offset_p): Likewise.
	(visium_print_operand_address): Likewise.
	* config/visium/visium.h (ASM_OUTPUT_ADDR_DIFF_ELT): Likewise.
	* config/xtensa/xtensa.c (xtensa_mem_offset): Likewise.
	(xtensa_expand_conditional_branch): Likewise.
	(xtensa_copy_incoming_a7): Likewise.
	(xtensa_output_literal): Likewise.
	* dfp.c (decimal_real_maxval): Likewise.
	* targhooks.c (default_libgcc_floating_mode_supported_p): Likewise.

gcc/c-family/
	* c-cppbuiltin.c (mode_has_fma): Prefix mode names with E_ in
	case statements.

gcc/objc/
	* objc-encoding.c (encode_gnu_bitfield): Prefix mode names with E_ in
	case statements.

libobjc/
	* encoding.c (_darwin_rs6000_special_round_type_align): Prefix mode
	names with E_ in case statements.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@251453 138bc75d-0d04-0410-961f-82ee72b054a4

3 files changed, 249 insertions, 249 deletions

diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index ae9a339f73a..25ee5129f62 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -537,27 +537,27 @@ aarch64_simd_builtin_std_type (machine_mode mode,
   ((q == qualifier_none) ? int##M##_type_node : unsigned_int##M##_type_node);
   switch (mode)
     {
-    case QImode:
+    case E_QImode:
       return QUAL_TYPE (QI);
-    case HImode:
+    case E_HImode:
       return QUAL_TYPE (HI);
-    case SImode:
+    case E_SImode:
       return QUAL_TYPE (SI);
-    case DImode:
+    case E_DImode:
       return QUAL_TYPE (DI);
-    case TImode:
+    case E_TImode:
       return QUAL_TYPE (TI);
-    case OImode:
+    case E_OImode:
       return aarch64_simd_intOI_type_node;
-    case CImode:
+    case E_CImode:
       return aarch64_simd_intCI_type_node;
-    case XImode:
+    case E_XImode:
       return aarch64_simd_intXI_type_node;
-    case HFmode:
+    case E_HFmode:
       return aarch64_fp16_type_node;
-    case SFmode:
+    case E_SFmode:
       return float_type_node;
-    case DFmode:
+    case E_DFmode:
       return double_type_node;
     default:
       gcc_unreachable ();
diff --git a/gcc/config/aarch64/aarch64-elf.h b/gcc/config/aarch64/aarch64-elf.h
index e12a7762638..12d67a09f64 100644
--- a/gcc/config/aarch64/aarch64-elf.h
+++ b/gcc/config/aarch64/aarch64-elf.h
@@ -74,16 +74,16 @@
   do {									\
     switch (GET_MODE (BODY))						\
       {									\
-      case QImode:							\
+      case E_QImode:							\
 	asm_fprintf (STREAM, "\t.byte\t(%LL%d - %LLrtx%d) / 4\n",	\
 		     VALUE, REL);					\
 	break;								\
-      case HImode:							\
+      case E_HImode:							\
 	asm_fprintf (STREAM, "\t.2byte\t(%LL%d - %LLrtx%d) / 4\n",	\
 		     VALUE, REL);					\
 	break;								\
-      case SImode:							\
-      case DImode: /* See comment in aarch64_output_casesi.  */		\
+      case E_SImode:							\
+      case E_DImode: /* See comment in aarch64_output_casesi.  */		\
 	asm_fprintf (STREAM, "\t.word\t(%LL%d - %LLrtx%d) / 4\n",	\
 		     VALUE, REL);					\
 	break;								\
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 64c6a7b0733..ced6f9bf829 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1698,25 +1698,25 @@ aarch64_split_simd_combine (rtx dst, rtx src1, rtx src2)
 
   switch (src_mode)
     {
-    case V8QImode:
+    case E_V8QImode:
       gen = gen_aarch64_simd_combinev8qi;
       break;
-    case V4HImode:
+    case E_V4HImode:
       gen = gen_aarch64_simd_combinev4hi;
       break;
-    case V2SImode:
+    case E_V2SImode:
       gen = gen_aarch64_simd_combinev2si;
       break;
-    case V4HFmode:
+    case E_V4HFmode:
       gen = gen_aarch64_simd_combinev4hf;
       break;
-    case V2SFmode:
+    case E_V2SFmode:
       gen = gen_aarch64_simd_combinev2sf;
       break;
-    case DImode:
+    case E_DImode:
       gen = gen_aarch64_simd_combinedi;
       break;
-    case DFmode:
+    case E_DFmode:
       gen = gen_aarch64_simd_combinedf;
       break;
     default:
@@ -1745,25 +1745,25 @@ aarch64_split_simd_move (rtx dst, rtx src)
 
       switch (src_mode)
 	{
-	case V16QImode:
+	case E_V16QImode:
 	  gen = gen_aarch64_split_simd_movv16qi;
 	  break;
-	case V8HImode:
+	case E_V8HImode:
 	  gen = gen_aarch64_split_simd_movv8hi;
 	  break;
-	case V4SImode:
+	case E_V4SImode:
 	  gen = gen_aarch64_split_simd_movv4si;
 	  break;
-	case V2DImode:
+	case E_V2DImode:
 	  gen = gen_aarch64_split_simd_movv2di;
 	  break;
-	case V8HFmode:
+	case E_V8HFmode:
 	  gen = gen_aarch64_split_simd_movv8hf;
 	  break;
-	case V4SFmode:
+	case E_V4SFmode:
 	  gen = gen_aarch64_split_simd_movv4sf;
 	  break;
-	case V2DFmode:
+	case E_V2DFmode:
 	  gen = gen_aarch64_split_simd_movv2df;
 	  break;
 	default:
@@ -3086,11 +3086,11 @@ aarch64_gen_storewb_pair (machine_mode mode, rtx base, rtx reg, rtx reg2,
 {
   switch (mode)
     {
-    case DImode:
+    case E_DImode:
       return gen_storewb_pairdi_di (base, base, reg, reg2,
 				    GEN_INT (-adjustment),
 				    GEN_INT (UNITS_PER_WORD - adjustment));
-    case DFmode:
+    case E_DFmode:
       return gen_storewb_pairdf_di (base, base, reg, reg2,
 				    GEN_INT (-adjustment),
 				    GEN_INT (UNITS_PER_WORD - adjustment));
@@ -3130,10 +3130,10 @@ aarch64_gen_loadwb_pair (machine_mode mode, rtx base, rtx reg, rtx reg2,
 {
   switch (mode)
     {
-    case DImode:
+    case E_DImode:
       return gen_loadwb_pairdi_di (base, base, reg, reg2, GEN_INT (adjustment),
 				   GEN_INT (UNITS_PER_WORD));
-    case DFmode:
+    case E_DFmode:
       return gen_loadwb_pairdf_di (base, base, reg, reg2, GEN_INT (adjustment),
 				   GEN_INT (UNITS_PER_WORD));
     default:
@@ -3178,10 +3178,10 @@ aarch64_gen_store_pair (machine_mode mode, rtx mem1, rtx reg1, rtx mem2,
 {
   switch (mode)
     {
-    case DImode:
+    case E_DImode:
       return gen_store_pairdi (mem1, reg1, mem2, reg2);
 
-    case DFmode:
+    case E_DFmode:
       return gen_store_pairdf (mem1, reg1, mem2, reg2);
 
     default:
@@ -3198,10 +3198,10 @@ aarch64_gen_load_pair (machine_mode mode, rtx reg1, rtx mem1, rtx reg2,
 {
   switch (mode)
     {
-    case DImode:
+    case E_DImode:
       return gen_load_pairdi (reg1, mem1, reg2, mem2);
 
-    case DFmode:
+    case E_DFmode:
       return gen_load_pairdf (reg1, mem1, reg2, mem2);
 
     default:
@@ -4994,8 +4994,8 @@ aarch64_get_condition_code_1 (machine_mode mode, enum rtx_code comp_code)
 {
   switch (mode)
     {
-    case CCFPmode:
-    case CCFPEmode:
+    case E_CCFPmode:
+    case E_CCFPEmode:
       switch (comp_code)
 	{
 	case GE: return AARCH64_GE;
@@ -5014,7 +5014,7 @@ aarch64_get_condition_code_1 (machine_mode mode, enum rtx_code comp_code)
 	}
       break;
 
-    case CCmode:
+    case E_CCmode:
       switch (comp_code)
 	{
 	case NE: return AARCH64_NE;
@@ -5031,7 +5031,7 @@ aarch64_get_condition_code_1 (machine_mode mode, enum rtx_code comp_code)
 	}
       break;
 
-    case CC_SWPmode:
+    case E_CC_SWPmode:
       switch (comp_code)
 	{
 	case NE: return AARCH64_NE;
@@ -5048,7 +5048,7 @@ aarch64_get_condition_code_1 (machine_mode mode, enum rtx_code comp_code)
 	}
       break;
 
-    case CC_NZmode:
+    case E_CC_NZmode:
       switch (comp_code)
 	{
 	case NE: return AARCH64_NE;
@@ -5059,7 +5059,7 @@ aarch64_get_condition_code_1 (machine_mode mode, enum rtx_code comp_code)
 	}
       break;
 
-    case CC_Zmode:
+    case E_CC_Zmode:
       switch (comp_code)
 	{
 	case NE: return AARCH64_NE;
@@ -5068,7 +5068,7 @@ aarch64_get_condition_code_1 (machine_mode mode, enum rtx_code comp_code)
 	}
       break;
 
-    case CC_Cmode:
+    case E_CC_Cmode:
       switch (comp_code)
 	{
 	case NE: return AARCH64_CS;
@@ -5776,37 +5776,37 @@ aarch64_constant_pool_reload_icode (machine_mode mode)
 {
   switch (mode)
     {
-    case SFmode:
+    case E_SFmode:
       return CODE_FOR_aarch64_reload_movcpsfdi;
 
-    case DFmode:
+    case E_DFmode:
       return CODE_FOR_aarch64_reload_movcpdfdi;
 
-    case TFmode:
+    case E_TFmode:
       return CODE_FOR_aarch64_reload_movcptfdi;
 
-    case V8QImode:
+    case E_V8QImode:
       return CODE_FOR_aarch64_reload_movcpv8qidi;
 
-    case V16QImode:
+    case E_V16QImode:
       return CODE_FOR_aarch64_reload_movcpv16qidi;
 
-    case V4HImode:
+    case E_V4HImode:
       return CODE_FOR_aarch64_reload_movcpv4hidi;
 
-    case V8HImode:
+    case E_V8HImode:
       return CODE_FOR_aarch64_reload_movcpv8hidi;
 
-    case V2SImode:
+    case E_V2SImode:
       return CODE_FOR_aarch64_reload_movcpv2sidi;
 
-    case V4SImode:
+    case E_V4SImode:
       return CODE_FOR_aarch64_reload_movcpv4sidi;
 
-    case V2DImode:
+    case E_V2DImode:
       return CODE_FOR_aarch64_reload_movcpv2didi;
 
-    case V2DFmode:
+    case E_V2DFmode:
       return CODE_FOR_aarch64_reload_movcpv2dfdi;
 
     default:
@@ -8222,11 +8222,11 @@ get_rsqrte_type (machine_mode mode)
 {
   switch (mode)
   {
-    case DFmode:   return gen_aarch64_rsqrtedf;
-    case SFmode:   return gen_aarch64_rsqrtesf;
-    case V2DFmode: return gen_aarch64_rsqrtev2df;
-    case V2SFmode: return gen_aarch64_rsqrtev2sf;
-    case V4SFmode: return gen_aarch64_rsqrtev4sf;
+    case E_DFmode:   return gen_aarch64_rsqrtedf;
+    case E_SFmode:   return gen_aarch64_rsqrtesf;
+    case E_V2DFmode: return gen_aarch64_rsqrtev2df;
+    case E_V2SFmode: return gen_aarch64_rsqrtev2sf;
+    case E_V4SFmode: return gen_aarch64_rsqrtev4sf;
     default: gcc_unreachable ();
   }
 }
@@ -8240,11 +8240,11 @@ get_rsqrts_type (machine_mode mode)
 {
   switch (mode)
   {
-    case DFmode:   return gen_aarch64_rsqrtsdf;
-    case SFmode:   return gen_aarch64_rsqrtssf;
-    case V2DFmode: return gen_aarch64_rsqrtsv2df;
-    case V2SFmode: return gen_aarch64_rsqrtsv2sf;
-    case V4SFmode: return gen_aarch64_rsqrtsv4sf;
+    case E_DFmode:   return gen_aarch64_rsqrtsdf;
+    case E_SFmode:   return gen_aarch64_rsqrtssf;
+    case E_V2DFmode: return gen_aarch64_rsqrtsv2df;
+    case E_V2SFmode: return gen_aarch64_rsqrtsv2sf;
+    case E_V4SFmode: return gen_aarch64_rsqrtsv4sf;
     default: gcc_unreachable ();
   }
 }
@@ -8349,12 +8349,12 @@ get_recpe_type (machine_mode mode)
 {
   switch (mode)
   {
-    case SFmode:   return (gen_aarch64_frecpesf);
-    case V2SFmode: return (gen_aarch64_frecpev2sf);
-    case V4SFmode: return (gen_aarch64_frecpev4sf);
-    case DFmode:   return (gen_aarch64_frecpedf);
-    case V2DFmode: return (gen_aarch64_frecpev2df);
-    default:       gcc_unreachable ();
+    case E_SFmode:   return (gen_aarch64_frecpesf);
+    case E_V2SFmode: return (gen_aarch64_frecpev2sf);
+    case E_V4SFmode: return (gen_aarch64_frecpev4sf);
+    case E_DFmode:   return (gen_aarch64_frecpedf);
+    case E_V2DFmode: return (gen_aarch64_frecpev2df);
+    default:         gcc_unreachable ();
   }
 }
 
@@ -8367,12 +8367,12 @@ get_recps_type (machine_mode mode)
 {
   switch (mode)
   {
-    case SFmode:   return (gen_aarch64_frecpssf);
-    case V2SFmode: return (gen_aarch64_frecpsv2sf);
-    case V4SFmode: return (gen_aarch64_frecpsv4sf);
-    case DFmode:   return (gen_aarch64_frecpsdf);
-    case V2DFmode: return (gen_aarch64_frecpsv2df);
-    default:       gcc_unreachable ();
+    case E_SFmode:   return (gen_aarch64_frecpssf);
+    case E_V2SFmode: return (gen_aarch64_frecpsv2sf);
+    case E_V4SFmode: return (gen_aarch64_frecpsv4sf);
+    case E_DFmode:   return (gen_aarch64_frecpsdf);
+    case E_V2DFmode: return (gen_aarch64_frecpsv2df);
+    default:         gcc_unreachable ();
   }
 }
 
@@ -10743,24 +10743,24 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p,
       /* Establish the base type.  */
       switch (ag_mode)
 	{
-	case SFmode:
+	case E_SFmode:
 	  field_t = float_type_node;
 	  field_ptr_t = float_ptr_type_node;
 	  break;
-	case DFmode:
+	case E_DFmode:
 	  field_t = double_type_node;
 	  field_ptr_t = double_ptr_type_node;
 	  break;
-	case TFmode:
+	case E_TFmode:
 	  field_t = long_double_type_node;
 	  field_ptr_t = long_double_ptr_type_node;
 	  break;
-	case HFmode:
+	case E_HFmode:
 	  field_t = aarch64_fp16_type_node;
 	  field_ptr_t = aarch64_fp16_ptr_type_node;
 	  break;
-	case V2SImode:
-	case V4SImode:
+	case E_V2SImode:
+	case E_V4SImode:
 	    {
 	      tree innertype = make_signed_type (GET_MODE_PRECISION (SImode));
 	      field_t = build_vector_type_for_mode (innertype, ag_mode);
@@ -11217,19 +11217,19 @@ aarch64_simd_container_mode (machine_mode mode, unsigned width)
       if (width == 128)
 	switch (mode)
 	  {
-	  case DFmode:
+	  case E_DFmode:
 	    return V2DFmode;
-	  case SFmode:
+	  case E_SFmode:
 	    return V4SFmode;
-	  case HFmode:
+	  case E_HFmode:
 	    return V8HFmode;
-	  case SImode:
+	  case E_SImode:
 	    return V4SImode;
-	  case HImode:
+	  case E_HImode:
 	    return V8HImode;
-	  case QImode:
+	  case E_QImode:
 	    return V16QImode;
-	  case DImode:
+	  case E_DImode:
 	    return V2DImode;
 	  default:
 	    break;
@@ -11237,15 +11237,15 @@ aarch64_simd_container_mode (machine_mode mode, unsigned width)
       else
 	switch (mode)
 	  {
-	  case SFmode:
+	  case E_SFmode:
 	    return V2SFmode;
-	  case HFmode:
+	  case E_HFmode:
 	    return V4HFmode;
-	  case SImode:
+	  case E_SImode:
 	    return V2SImode;
-	  case HImode:
+	  case E_HImode:
 	    return V4HImode;
-	  case QImode:
+	  case E_QImode:
 	    return V8QImode;
 	  default:
 	    break;
@@ -12211,10 +12211,10 @@ aarch64_emit_load_exclusive (machine_mode mode, rtx rval,
 
   switch (mode)
     {
-    case QImode: gen = gen_aarch64_load_exclusiveqi; break;
-    case HImode: gen = gen_aarch64_load_exclusivehi; break;
-    case SImode: gen = gen_aarch64_load_exclusivesi; break;
-    case DImode: gen = gen_aarch64_load_exclusivedi; break;
+    case E_QImode: gen = gen_aarch64_load_exclusiveqi; break;
+    case E_HImode: gen = gen_aarch64_load_exclusivehi; break;
+    case E_SImode: gen = gen_aarch64_load_exclusivesi; break;
+    case E_DImode: gen = gen_aarch64_load_exclusivedi; break;
     default:
       gcc_unreachable ();
     }
@@ -12232,10 +12232,10 @@ aarch64_emit_store_exclusive (machine_mode mode, rtx bval,
 
   switch (mode)
     {
-    case QImode: gen = gen_aarch64_store_exclusiveqi; break;
-    case HImode: gen = gen_aarch64_store_exclusivehi; break;
-    case SImode: gen = gen_aarch64_store_exclusivesi; break;
-    case DImode: gen = gen_aarch64_store_exclusivedi; break;
+    case E_QImode: gen = gen_aarch64_store_exclusiveqi; break;
+    case E_HImode: gen = gen_aarch64_store_exclusivehi; break;
+    case E_SImode: gen = gen_aarch64_store_exclusivesi; break;
+    case E_DImode: gen = gen_aarch64_store_exclusivedi; break;
     default:
       gcc_unreachable ();
     }
@@ -12298,8 +12298,8 @@ aarch64_expand_compare_and_swap (rtx operands[])
 
   switch (mode)
     {
-    case QImode:
-    case HImode:
+    case E_QImode:
+    case E_HImode:
       /* For short modes, we're going to perform the comparison in SImode,
 	 so do the zero-extension now.  */
       cmp_mode = SImode;
@@ -12307,8 +12307,8 @@ aarch64_expand_compare_and_swap (rtx operands[])
       oldval = convert_modes (SImode, mode, oldval, true);
       /* Fall through.  */
 
-    case SImode:
-    case DImode:
+    case E_SImode:
+    case E_DImode:
       /* Force the value into a register if needed.  */
       if (!aarch64_plus_operand (oldval, mode))
 	oldval = force_reg (cmp_mode, oldval);
@@ -12320,10 +12320,10 @@ aarch64_expand_compare_and_swap (rtx operands[])
 
   switch (mode)
     {
-    case QImode: idx = 0; break;
-    case HImode: idx = 1; break;
-    case SImode: idx = 2; break;
-    case DImode: idx = 3; break;
+    case E_QImode: idx = 0; break;
+    case E_HImode: idx = 1; break;
+    case E_SImode: idx = 2; break;
+    case E_DImode: idx = 3; break;
     default:
       gcc_unreachable ();
     }
@@ -12402,10 +12402,10 @@ aarch64_gen_atomic_cas (rtx rval, rtx mem,
 
   switch (mode)
     {
-    case QImode: gen = gen_aarch64_atomic_casqi; break;
-    case HImode: gen = gen_aarch64_atomic_cashi; break;
-    case SImode: gen = gen_aarch64_atomic_cassi; break;
-    case DImode: gen = gen_aarch64_atomic_casdi; break;
+    case E_QImode: gen = gen_aarch64_atomic_casqi; break;
+    case E_HImode: gen = gen_aarch64_atomic_cashi; break;
+    case E_SImode: gen = gen_aarch64_atomic_cassi; break;
+    case E_DImode: gen = gen_aarch64_atomic_casdi; break;
     default:
       gcc_unreachable ();
     }
@@ -12528,8 +12528,8 @@ aarch64_emit_bic (machine_mode mode, rtx dst, rtx s1, rtx s2, int shift)
 
   switch (mode)
     {
-    case SImode: gen = gen_and_one_cmpl_lshrsi3; break;
-    case DImode: gen = gen_and_one_cmpl_lshrdi3; break;
+    case E_SImode: gen = gen_and_one_cmpl_lshrsi3; break;
+    case E_DImode: gen = gen_and_one_cmpl_lshrdi3; break;
     default:
       gcc_unreachable ();
     }
@@ -12547,10 +12547,10 @@ aarch64_emit_atomic_swap (machine_mode mode, rtx dst, rtx value,
 
   switch (mode)
     {
-    case QImode: gen = gen_aarch64_atomic_swpqi; break;
-    case HImode: gen = gen_aarch64_atomic_swphi; break;
-    case SImode: gen = gen_aarch64_atomic_swpsi; break;
-    case DImode: gen = gen_aarch64_atomic_swpdi; break;
+    case E_QImode: gen = gen_aarch64_atomic_swpqi; break;
+    case E_HImode: gen = gen_aarch64_atomic_swphi; break;
+    case E_SImode: gen = gen_aarch64_atomic_swpsi; break;
+    case E_DImode: gen = gen_aarch64_atomic_swpdi; break;
     default:
       gcc_unreachable ();
     }
@@ -12609,10 +12609,10 @@ aarch64_emit_atomic_load_op (enum aarch64_atomic_load_op_code code,
 
   switch (mode)
     {
-    case QImode: idx = 0; break;
-    case HImode: idx = 1; break;
-    case SImode: idx = 2; break;
-    case DImode: idx = 3; break;
+    case E_QImode: idx = 0; break;
+    case E_HImode: idx = 1; break;
+    case E_SImode: idx = 2; break;
+    case E_DImode: idx = 3; break;
     default:
       gcc_unreachable ();
     }
@@ -13243,18 +13243,18 @@ aarch64_evpc_trn (struct expand_vec_perm_d *d)
     {
       switch (vmode)
 	{
-	case V16QImode: gen = gen_aarch64_trn2v16qi; break;
-	case V8QImode: gen = gen_aarch64_trn2v8qi; break;
-	case V8HImode: gen = gen_aarch64_trn2v8hi; break;
-	case V4HImode: gen = gen_aarch64_trn2v4hi; break;
-	case V4SImode: gen = gen_aarch64_trn2v4si; break;
-	case V2SImode: gen = gen_aarch64_trn2v2si; break;
-	case V2DImode: gen = gen_aarch64_trn2v2di; break;
-	case V4HFmode: gen = gen_aarch64_trn2v4hf; break;
-	case V8HFmode: gen = gen_aarch64_trn2v8hf; break;
-	case V4SFmode: gen = gen_aarch64_trn2v4sf; break;
-	case V2SFmode: gen = gen_aarch64_trn2v2sf; break;
-	case V2DFmode: gen = gen_aarch64_trn2v2df; break;
+	case E_V16QImode: gen = gen_aarch64_trn2v16qi; break;
+	case E_V8QImode: gen = gen_aarch64_trn2v8qi; break;
+	case E_V8HImode: gen = gen_aarch64_trn2v8hi; break;
+	case E_V4HImode: gen = gen_aarch64_trn2v4hi; break;
+	case E_V4SImode: gen = gen_aarch64_trn2v4si; break;
+	case E_V2SImode: gen = gen_aarch64_trn2v2si; break;
+	case E_V2DImode: gen = gen_aarch64_trn2v2di; break;
+	case E_V4HFmode: gen = gen_aarch64_trn2v4hf; break;
+	case E_V8HFmode: gen = gen_aarch64_trn2v8hf; break;
+	case E_V4SFmode: gen = gen_aarch64_trn2v4sf; break;
+	case E_V2SFmode: gen = gen_aarch64_trn2v2sf; break;
+	case E_V2DFmode: gen = gen_aarch64_trn2v2df; break;
 	default:
 	  return false;
 	}
@@ -13263,18 +13263,18 @@ aarch64_evpc_trn (struct expand_vec_perm_d *d)
     {
       switch (vmode)
 	{
-	case V16QImode: gen = gen_aarch64_trn1v16qi; break;
-	case V8QImode: gen = gen_aarch64_trn1v8qi; break;
-	case V8HImode: gen = gen_aarch64_trn1v8hi; break;
-	case V4HImode: gen = gen_aarch64_trn1v4hi; break;
-	case V4SImode: gen = gen_aarch64_trn1v4si; break;
-	case V2SImode: gen = gen_aarch64_trn1v2si; break;
-	case V2DImode: gen = gen_aarch64_trn1v2di; break;
-	case V4HFmode: gen = gen_aarch64_trn1v4hf; break;
-	case V8HFmode: gen = gen_aarch64_trn1v8hf; break;
-	case V4SFmode: gen = gen_aarch64_trn1v4sf; break;
-	case V2SFmode: gen = gen_aarch64_trn1v2sf; break;
-	case V2DFmode: gen = gen_aarch64_trn1v2df; break;
+	case E_V16QImode: gen = gen_aarch64_trn1v16qi; break;
+	case E_V8QImode: gen = gen_aarch64_trn1v8qi; break;
+	case E_V8HImode: gen = gen_aarch64_trn1v8hi; break;
+	case E_V4HImode: gen = gen_aarch64_trn1v4hi; break;
+	case E_V4SImode: gen = gen_aarch64_trn1v4si; break;
+	case E_V2SImode: gen = gen_aarch64_trn1v2si; break;
+	case E_V2DImode: gen = gen_aarch64_trn1v2di; break;
+	case E_V4HFmode: gen = gen_aarch64_trn1v4hf; break;
+	case E_V8HFmode: gen = gen_aarch64_trn1v8hf; break;
+	case E_V4SFmode: gen = gen_aarch64_trn1v4sf; break;
+	case E_V2SFmode: gen = gen_aarch64_trn1v2sf; break;
+	case E_V2DFmode: gen = gen_aarch64_trn1v2df; break;
 	default:
 	  return false;
 	}
@@ -13330,18 +13330,18 @@ aarch64_evpc_uzp (struct expand_vec_perm_d *d)
     {
       switch (vmode)
 	{
-	case V16QImode: gen = gen_aarch64_uzp2v16qi; break;
-	case V8QImode: gen = gen_aarch64_uzp2v8qi; break;
-	case V8HImode: gen = gen_aarch64_uzp2v8hi; break;
-	case V4HImode: gen = gen_aarch64_uzp2v4hi; break;
-	case V4SImode: gen = gen_aarch64_uzp2v4si; break;
-	case V2SImode: gen = gen_aarch64_uzp2v2si; break;
-	case V2DImode: gen = gen_aarch64_uzp2v2di; break;
-	case V4HFmode: gen = gen_aarch64_uzp2v4hf; break;
-	case V8HFmode: gen = gen_aarch64_uzp2v8hf; break;
-	case V4SFmode: gen = gen_aarch64_uzp2v4sf; break;
-	case V2SFmode: gen = gen_aarch64_uzp2v2sf; break;
-	case V2DFmode: gen = gen_aarch64_uzp2v2df; break;
+	case E_V16QImode: gen = gen_aarch64_uzp2v16qi; break;
+	case E_V8QImode: gen = gen_aarch64_uzp2v8qi; break;
+	case E_V8HImode: gen = gen_aarch64_uzp2v8hi; break;
+	case E_V4HImode: gen = gen_aarch64_uzp2v4hi; break;
+	case E_V4SImode: gen = gen_aarch64_uzp2v4si; break;
+	case E_V2SImode: gen = gen_aarch64_uzp2v2si; break;
+	case E_V2DImode: gen = gen_aarch64_uzp2v2di; break;
+	case E_V4HFmode: gen = gen_aarch64_uzp2v4hf; break;
+	case E_V8HFmode: gen = gen_aarch64_uzp2v8hf; break;
+	case E_V4SFmode: gen = gen_aarch64_uzp2v4sf; break;
+	case E_V2SFmode: gen = gen_aarch64_uzp2v2sf; break;
+	case E_V2DFmode: gen = gen_aarch64_uzp2v2df; break;
 	default:
 	  return false;
 	}
@@ -13350,18 +13350,18 @@ aarch64_evpc_uzp (struct expand_vec_perm_d *d)
     {
       switch (vmode)
 	{
-	case V16QImode: gen = gen_aarch64_uzp1v16qi; break;
-	case V8QImode: gen = gen_aarch64_uzp1v8qi; break;
-	case V8HImode: gen = gen_aarch64_uzp1v8hi; break;
-	case V4HImode: gen = gen_aarch64_uzp1v4hi; break;
-	case V4SImode: gen = gen_aarch64_uzp1v4si; break;
-	case V2SImode: gen = gen_aarch64_uzp1v2si; break;
-	case V2DImode: gen = gen_aarch64_uzp1v2di; break;
-	case V4HFmode: gen = gen_aarch64_uzp1v4hf; break;
-	case V8HFmode: gen = gen_aarch64_uzp1v8hf; break;
-	case V4SFmode: gen = gen_aarch64_uzp1v4sf; break;
-	case V2SFmode: gen = gen_aarch64_uzp1v2sf; break;
-	case V2DFmode: gen = gen_aarch64_uzp1v2df; break;
+	case E_V16QImode: gen = gen_aarch64_uzp1v16qi; break;
+	case E_V8QImode: gen = gen_aarch64_uzp1v8qi; break;
+	case E_V8HImode: gen = gen_aarch64_uzp1v8hi; break;
+	case E_V4HImode: gen = gen_aarch64_uzp1v4hi; break;
+	case E_V4SImode: gen = gen_aarch64_uzp1v4si; break;
+	case E_V2SImode: gen = gen_aarch64_uzp1v2si; break;
+	case E_V2DImode: gen = gen_aarch64_uzp1v2di; break;
+	case E_V4HFmode: gen = gen_aarch64_uzp1v4hf; break;
+	case E_V8HFmode: gen = gen_aarch64_uzp1v8hf; break;
+	case E_V4SFmode: gen = gen_aarch64_uzp1v4sf; break;
+	case E_V2SFmode: gen = gen_aarch64_uzp1v2sf; break;
+	case E_V2DFmode: gen = gen_aarch64_uzp1v2df; break;
 	default:
 	  return false;
 	}
@@ -13422,18 +13422,18 @@ aarch64_evpc_zip (struct expand_vec_perm_d *d)
     {
       switch (vmode)
 	{
-	case V16QImode: gen = gen_aarch64_zip2v16qi; break;
-	case V8QImode: gen = gen_aarch64_zip2v8qi; break;
-	case V8HImode: gen = gen_aarch64_zip2v8hi; break;
-	case V4HImode: gen = gen_aarch64_zip2v4hi; break;
-	case V4SImode: gen = gen_aarch64_zip2v4si; break;
-	case V2SImode: gen = gen_aarch64_zip2v2si; break;
-	case V2DImode: gen = gen_aarch64_zip2v2di; break;
-	case V4HFmode: gen = gen_aarch64_zip2v4hf; break;
-	case V8HFmode: gen = gen_aarch64_zip2v8hf; break;
-	case V4SFmode: gen = gen_aarch64_zip2v4sf; break;
-	case V2SFmode: gen = gen_aarch64_zip2v2sf; break;
-	case V2DFmode: gen = gen_aarch64_zip2v2df; break;
+	case E_V16QImode: gen = gen_aarch64_zip2v16qi; break;
+	case E_V8QImode: gen = gen_aarch64_zip2v8qi; break;
+	case E_V8HImode: gen = gen_aarch64_zip2v8hi; break;
+	case E_V4HImode: gen = gen_aarch64_zip2v4hi; break;
+	case E_V4SImode: gen = gen_aarch64_zip2v4si; break;
+	case E_V2SImode: gen = gen_aarch64_zip2v2si; break;
+	case E_V2DImode: gen = gen_aarch64_zip2v2di; break;
+	case E_V4HFmode: gen = gen_aarch64_zip2v4hf; break;
+	case E_V8HFmode: gen = gen_aarch64_zip2v8hf; break;
+	case E_V4SFmode: gen = gen_aarch64_zip2v4sf; break;
+	case E_V2SFmode: gen = gen_aarch64_zip2v2sf; break;
+	case E_V2DFmode: gen = gen_aarch64_zip2v2df; break;
 	default:
 	  return false;
 	}
@@ -13442,18 +13442,18 @@ aarch64_evpc_zip (struct expand_vec_perm_d *d)
     {
       switch (vmode)
 	{
-	case V16QImode: gen = gen_aarch64_zip1v16qi; break;
-	case V8QImode: gen = gen_aarch64_zip1v8qi; break;
-	case V8HImode: gen = gen_aarch64_zip1v8hi; break;
-	case V4HImode: gen = gen_aarch64_zip1v4hi; break;
-	case V4SImode: gen = gen_aarch64_zip1v4si; break;
-	case V2SImode: gen = gen_aarch64_zip1v2si; break;
-	case V2DImode: gen = gen_aarch64_zip1v2di; break;
-	case V4HFmode: gen = gen_aarch64_zip1v4hf; break;
-	case V8HFmode: gen = gen_aarch64_zip1v8hf; break;
-	case V4SFmode: gen = gen_aarch64_zip1v4sf; break;
-	case V2SFmode: gen = gen_aarch64_zip1v2sf; break;
-	case V2DFmode: gen = gen_aarch64_zip1v2df; break;
+	case E_V16QImode: gen = gen_aarch64_zip1v16qi; break;
+	case E_V8QImode: gen = gen_aarch64_zip1v8qi; break;
+	case E_V8HImode: gen = gen_aarch64_zip1v8hi; break;
+	case E_V4HImode: gen = gen_aarch64_zip1v4hi; break;
+	case E_V4SImode: gen = gen_aarch64_zip1v4si; break;
+	case E_V2SImode: gen = gen_aarch64_zip1v2si; break;
+	case E_V2DImode: gen = gen_aarch64_zip1v2di; break;
+	case E_V4HFmode: gen = gen_aarch64_zip1v4hf; break;
+	case E_V8HFmode: gen = gen_aarch64_zip1v8hf; break;
+	case E_V4SFmode: gen = gen_aarch64_zip1v4sf; break;
+	case E_V2SFmode: gen = gen_aarch64_zip1v2sf; break;
+	case E_V2DFmode: gen = gen_aarch64_zip1v2df; break;
 	default:
 	  return false;
 	}
@@ -13489,18 +13489,18 @@ aarch64_evpc_ext (struct expand_vec_perm_d *d)
 
   switch (d->vmode)
     {
-    case V16QImode: gen = gen_aarch64_extv16qi; break;
-    case V8QImode: gen = gen_aarch64_extv8qi; break;
-    case V4HImode: gen = gen_aarch64_extv4hi; break;
-    case V8HImode: gen = gen_aarch64_extv8hi; break;
-    case V2SImode: gen = gen_aarch64_extv2si; break;
-    case V4SImode: gen = gen_aarch64_extv4si; break;
-    case V4HFmode: gen = gen_aarch64_extv4hf; break;
-    case V8HFmode: gen = gen_aarch64_extv8hf; break;
-    case V2SFmode: gen = gen_aarch64_extv2sf; break;
-    case V4SFmode: gen = gen_aarch64_extv4sf; break;
-    case V2DImode: gen = gen_aarch64_extv2di; break;
-    case V2DFmode: gen = gen_aarch64_extv2df; break;
+    case E_V16QImode: gen = gen_aarch64_extv16qi; break;
+    case E_V8QImode: gen = gen_aarch64_extv8qi; break;
+    case E_V4HImode: gen = gen_aarch64_extv4hi; break;
+    case E_V8HImode: gen = gen_aarch64_extv8hi; break;
+    case E_V2SImode: gen = gen_aarch64_extv2si; break;
+    case E_V4SImode: gen = gen_aarch64_extv4si; break;
+    case E_V4HFmode: gen = gen_aarch64_extv4hf; break;
+    case E_V8HFmode: gen = gen_aarch64_extv8hf; break;
+    case E_V2SFmode: gen = gen_aarch64_extv2sf; break;
+    case E_V4SFmode: gen = gen_aarch64_extv4sf; break;
+    case E_V2DImode: gen = gen_aarch64_extv2di; break;
+    case E_V2DFmode: gen = gen_aarch64_extv2df; break;
     default:
       return false;
     }
@@ -13544,8 +13544,8 @@ aarch64_evpc_rev (struct expand_vec_perm_d *d)
     case 7:
       switch (d->vmode)
 	{
-	case V16QImode: gen = gen_aarch64_rev64v16qi; break;
-	case V8QImode: gen = gen_aarch64_rev64v8qi;  break;
+	case E_V16QImode: gen = gen_aarch64_rev64v16qi; break;
+	case E_V8QImode: gen = gen_aarch64_rev64v8qi;  break;
 	default:
 	  return false;
 	}
@@ -13553,10 +13553,10 @@ aarch64_evpc_rev (struct expand_vec_perm_d *d)
     case 3:
       switch (d->vmode)
 	{
-	case V16QImode: gen = gen_aarch64_rev32v16qi; break;
-	case V8QImode: gen = gen_aarch64_rev32v8qi;  break;
-	case V8HImode: gen = gen_aarch64_rev64v8hi;  break;
-	case V4HImode: gen = gen_aarch64_rev64v4hi;  break;
+	case E_V16QImode: gen = gen_aarch64_rev32v16qi; break;
+	case E_V8QImode: gen = gen_aarch64_rev32v8qi;  break;
+	case E_V8HImode: gen = gen_aarch64_rev64v8hi;  break;
+	case E_V4HImode: gen = gen_aarch64_rev64v4hi;  break;
 	default:
 	  return false;
 	}
@@ -13564,16 +13564,16 @@ aarch64_evpc_rev (struct expand_vec_perm_d *d)
     case 1:
       switch (d->vmode)
 	{
-	case V16QImode: gen = gen_aarch64_rev16v16qi; break;
-	case V8QImode: gen = gen_aarch64_rev16v8qi;  break;
-	case V8HImode: gen = gen_aarch64_rev32v8hi;  break;
-	case V4HImode: gen = gen_aarch64_rev32v4hi;  break;
-	case V4SImode: gen = gen_aarch64_rev64v4si;  break;
-	case V2SImode: gen = gen_aarch64_rev64v2si;  break;
-	case V4SFmode: gen = gen_aarch64_rev64v4sf;  break;
-	case V2SFmode: gen = gen_aarch64_rev64v2sf;  break;
-	case V8HFmode: gen = gen_aarch64_rev64v8hf;  break;
-	case V4HFmode: gen = gen_aarch64_rev64v4hf;  break;
+	case E_V16QImode: gen = gen_aarch64_rev16v16qi; break;
+	case E_V8QImode: gen = gen_aarch64_rev16v8qi;  break;
+	case E_V8HImode: gen = gen_aarch64_rev32v8hi;  break;
+	case E_V4HImode: gen = gen_aarch64_rev32v4hi;  break;
+	case E_V4SImode: gen = gen_aarch64_rev64v4si;  break;
+	case E_V2SImode: gen = gen_aarch64_rev64v2si;  break;
+	case E_V4SFmode: gen = gen_aarch64_rev64v4sf;  break;
+	case E_V2SFmode: gen = gen_aarch64_rev64v2sf;  break;
+	case E_V8HFmode: gen = gen_aarch64_rev64v8hf;  break;
+	case E_V4HFmode: gen = gen_aarch64_rev64v4hf;  break;
 	default:
 	  return false;
 	}
@@ -13630,18 +13630,18 @@ aarch64_evpc_dup (struct expand_vec_perm_d *d)
 
   switch (vmode)
     {
-    case V16QImode: gen = gen_aarch64_dup_lanev16qi; break;
-    case V8QImode: gen = gen_aarch64_dup_lanev8qi; break;
-    case V8HImode: gen = gen_aarch64_dup_lanev8hi; break;
-    case V4HImode: gen = gen_aarch64_dup_lanev4hi; break;
-    case V4SImode: gen = gen_aarch64_dup_lanev4si; break;
-    case V2SImode: gen = gen_aarch64_dup_lanev2si; break;
-    case V2DImode: gen = gen_aarch64_dup_lanev2di; break;
-    case V8HFmode: gen = gen_aarch64_dup_lanev8hf; break;
-    case V4HFmode: gen = gen_aarch64_dup_lanev4hf; break;
-    case V4SFmode: gen = gen_aarch64_dup_lanev4sf; break;
-    case V2SFmode: gen = gen_aarch64_dup_lanev2sf; break;
-    case V2DFmode: gen = gen_aarch64_dup_lanev2df; break;
+    case E_V16QImode: gen = gen_aarch64_dup_lanev16qi; break;
+    case E_V8QImode: gen = gen_aarch64_dup_lanev8qi; break;
+    case E_V8HImode: gen = gen_aarch64_dup_lanev8hi; break;
+    case E_V4HImode: gen = gen_aarch64_dup_lanev4hi; break;
+    case E_V4SImode: gen = gen_aarch64_dup_lanev4si; break;
+    case E_V2SImode: gen = gen_aarch64_dup_lanev2si; break;
+    case E_V2DImode: gen = gen_aarch64_dup_lanev2di; break;
+    case E_V8HFmode: gen = gen_aarch64_dup_lanev8hf; break;
+    case E_V4HFmode: gen = gen_aarch64_dup_lanev4hf; break;
+    case E_V4SFmode: gen = gen_aarch64_dup_lanev4sf; break;
+    case E_V2SFmode: gen = gen_aarch64_dup_lanev2sf; break;
+    case E_V2DFmode: gen = gen_aarch64_dup_lanev2df; break;
     default:
       return false;
     }
@@ -14125,25 +14125,25 @@ aarch64_gen_ccmp_first (rtx_insn **prep_seq, rtx_insn **gen_seq,
 
   switch (op_mode)
     {
-    case QImode:
-    case HImode:
-    case SImode:
+    case E_QImode:
+    case E_HImode:
+    case E_SImode:
       cmp_mode = SImode;
       icode = CODE_FOR_cmpsi;
       break;
 
-    case DImode:
+    case E_DImode:
       cmp_mode = DImode;
       icode = CODE_FOR_cmpdi;
       break;
 
-    case SFmode:
+    case E_SFmode:
       cmp_mode = SFmode;
       cc_mode = aarch64_select_cc_mode ((rtx_code) code, op0, op1);
       icode = cc_mode == CCFPEmode ? CODE_FOR_fcmpesf : CODE_FOR_fcmpsf;
       break;
 
-    case DFmode:
+    case E_DFmode:
       cmp_mode = DFmode;
       cc_mode = aarch64_select_cc_mode ((rtx_code) code, op0, op1);
       icode = cc_mode == CCFPEmode ? CODE_FOR_fcmpedf : CODE_FOR_fcmpdf;
@@ -14200,25 +14200,25 @@ aarch64_gen_ccmp_next (rtx_insn **prep_seq, rtx_insn **gen_seq, rtx prev,
 
   switch (op_mode)
     {
-    case QImode:
-    case HImode:
-    case SImode:
+    case E_QImode:
+    case E_HImode:
+    case E_SImode:
       cmp_mode = SImode;
       icode = CODE_FOR_ccmpsi;
       break;
 
-    case DImode:
+    case E_DImode:
       cmp_mode = DImode;
       icode = CODE_FOR_ccmpdi;
       break;
 
-    case SFmode:
+    case E_SFmode:
       cmp_mode = SFmode;
       cc_mode = aarch64_select_cc_mode ((rtx_code) cmp_code, op0, op1);
       icode = cc_mode == CCFPEmode ? CODE_FOR_fccmpesf : CODE_FOR_fccmpsf;
       break;
 
-    case DFmode:
+    case E_DFmode:
       cmp_mode = DFmode;
       cc_mode = aarch64_select_cc_mode ((rtx_code) cmp_code, op0, op1);
       icode = cc_mode == CCFPEmode ? CODE_FOR_fccmpedf : CODE_FOR_fccmpdf;