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author | alalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-09-05 09:58:21 +0000 |
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committer | alalaw01 <alalaw01@138bc75d-0d04-0410-961f-82ee72b054a4> | 2014-09-05 09:58:21 +0000 |
commit | 8dc079f065a13cfb56706533a079acc4485d439c (patch) | |
tree | 6cd5b612c461e56eb8d93e47add14cf8c94ee5b3 /gcc/config/aarch64 | |
parent | d25159ccc19890dd9c7f77ebd8fb87d274ea1b75 (diff) | |
download | gcc-8dc079f065a13cfb56706533a079acc4485d439c.tar.gz |
[PATCH AArch64] Add a builtin for rbit(q?)_p8; add intrinsics and tests.
gcc/:
* config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): New pattern.
* config/aarch64/aarch64-simd-builtins.def (rbit): New builtin.
* config/aarch64/arm_neon.h (vrbit_s8, vrbit_u8, vrbitq_s8, vrbitq_u8):
Replace temporary asm with call to builtin.
(vrbit_p8, vrbitq_p8): New functions.
gcc/testsuite/:
* gcc.target/aarch64/simd/vrbit_1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@214943 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/aarch64')
-rw-r--r-- | gcc/config/aarch64/aarch64-simd-builtins.def | 2 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64-simd.md | 9 | ||||
-rw-r--r-- | gcc/config/aarch64/arm_neon.h | 82 |
3 files changed, 49 insertions, 44 deletions
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index 4f3bd12c844..aa19130b00b 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -344,6 +344,8 @@ VAR5 (UNOPU, bswap, 10, v4hi, v8hi, v2si, v4si, v2di) + BUILTIN_VB (UNOP, rbit, 0) + /* Implemented by aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>. */ BUILTIN_VALL (BINOP, zip1, 0) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index c4896364f48..8ffc75e171e 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -294,6 +294,15 @@ [(set_attr "type" "neon_rev<q>")] ) +(define_insn "aarch64_rbit<mode>" + [(set (match_operand:VB 0 "register_operand" "=w") + (unspec:VB [(match_operand:VB 1 "register_operand" "w")] + UNSPEC_RBIT))] + "TARGET_SIMD" + "rbit\\t%0.<Vbtype>, %1.<Vbtype>" + [(set_attr "type" "neon_rbit")] +) + (define_insn "*aarch64_mul3_elt<mode>" [(set (match_operand:VMUL 0 "register_operand" "=w") (mult:VMUL diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 0a86172ccb9..86926b9bb97 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -10407,50 +10407,6 @@ vqrdmulhq_n_s32 (int32x4_t a, int32_t b) result; \ }) -__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) -vrbit_s8 (int8x8_t a) -{ - int8x8_t result; - __asm__ ("rbit %0.8b,%1.8b" - : "=w"(result) - : "w"(a) - : /* No clobbers */); - return result; -} - -__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) -vrbit_u8 (uint8x8_t a) -{ - uint8x8_t result; - __asm__ ("rbit %0.8b,%1.8b" - : "=w"(result) - : "w"(a) - : /* No clobbers */); - return result; -} - -__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) -vrbitq_s8 (int8x16_t a) -{ - int8x16_t result; - __asm__ ("rbit %0.16b,%1.16b" - : "=w"(result) - : "w"(a) - : /* No clobbers */); - return result; -} - -__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) -vrbitq_u8 (uint8x16_t a) -{ - uint8x16_t result; - __asm__ ("rbit %0.16b,%1.16b" - : "=w"(result) - : "w"(a) - : /* No clobbers */); - return result; -} - __extension__ static __inline uint32x2_t __attribute__ ((__always_inline__)) vrecpe_u32 (uint32x2_t a) { @@ -20781,6 +20737,44 @@ vqsubd_u64 (uint64_t __a, uint64_t __b) return __builtin_aarch64_uqsubdi_uuu (__a, __b); } +/* vrbit */ + +__extension__ static __inline poly8x8_t __attribute__ ((__always_inline__)) +vrbit_p8 (poly8x8_t __a) +{ + return (poly8x8_t) __builtin_aarch64_rbitv8qi ((int8x8_t) __a); +} + +__extension__ static __inline int8x8_t __attribute__ ((__always_inline__)) +vrbit_s8 (int8x8_t __a) +{ + return __builtin_aarch64_rbitv8qi (__a); +} + +__extension__ static __inline uint8x8_t __attribute__ ((__always_inline__)) +vrbit_u8 (uint8x8_t __a) +{ + return (uint8x8_t) __builtin_aarch64_rbitv8qi ((int8x8_t) __a); +} + +__extension__ static __inline poly8x16_t __attribute__ ((__always_inline__)) +vrbitq_p8 (poly8x16_t __a) +{ + return (poly8x16_t) __builtin_aarch64_rbitv16qi ((int8x16_t)__a); +} + +__extension__ static __inline int8x16_t __attribute__ ((__always_inline__)) +vrbitq_s8 (int8x16_t __a) +{ + return __builtin_aarch64_rbitv16qi (__a); +} + +__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__)) +vrbitq_u8 (uint8x16_t __a) +{ + return (uint8x16_t) __builtin_aarch64_rbitv16qi ((int8x16_t) __a); +} + /* vrecpe */ __extension__ static __inline float32_t __attribute__ ((__always_inline__)) |