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| author | Tamar Christina <tamar.christina@arm.com> | 2017-10-26 06:42:41 +0000 |
|---|---|---|
| committer | Tamar Christina <tnfchris@gcc.gnu.org> | 2017-10-26 06:42:41 +0000 |
| commit | 1013465feaf83fd7503711c03a0c1013a7a37ca4 (patch) | |
| tree | 08ccf143fd3c242e17024f9e6a3412efba87a5fe /gcc/config/aarch64 | |
| parent | c3ef5fda143585ca19dff5a977b6aa87b7a17566 (diff) | |
| download | gcc-1013465feaf83fd7503711c03a0c1013a7a37ca4.tar.gz | |
re PR target/81800 (On aarch64 ilp32 lrint should not be inlined as two instructions)
2017-10-26 Tamar Christina <tamar.christina@arm.com>
PR target/81800
* config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): Add flag_trapping_math
and flag_fp_int_builtin_inexact.
gcc/testsuite/
2017-10-26 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/inline-lrint_2.c (dg-options): Add -fno-trapping-math.
From-SVN: r254098
Diffstat (limited to 'gcc/config/aarch64')
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 389f2f9d31a..eee836be055 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -5155,7 +5155,9 @@ (define_expand "lrint<GPF:mode><GPI:mode>2" [(match_operand:GPI 0 "register_operand") (match_operand:GPF 1 "register_operand")] - "TARGET_FLOAT" + "TARGET_FLOAT + && ((GET_MODE_SIZE (<GPF:MODE>mode) <= GET_MODE_SIZE (<GPI:MODE>mode)) + || !flag_trapping_math || flag_fp_int_builtin_inexact)" { rtx cvt = gen_reg_rtx (<GPF:MODE>mode); emit_insn (gen_rint<GPF:mode>2 (cvt, operands[1])); |