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authorjgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4>2013-12-18 19:25:45 +0000
committerjgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4>2013-12-18 19:25:45 +0000
commit04232093c11c6790518366f1606620eebd2b1586 (patch)
tree82f7601779fde94ef5d2407a98f0c44031c59f00 /gcc/config/aarch64/aarch64-cores.def
parent60ae84fc4d8621707474432fd7459b8468f63194 (diff)
downloadgcc-04232093c11c6790518366f1606620eebd2b1586.tar.gz
[AArch64 2/3 big.LITTLE] Allow tuning parameters without unique tuning targets.
gcc/ * config/aarch64/aarch64-cores.def: Add new column for SCHEDULER_IDENT. * config/aarch64/aarch64-opts.h (AARCH64_CORE): Handle SCHEDULER_IDENT. * config/aarch64/aarch64.c (AARCH64_CORE): Handle SCHEDULER_IDENT. (aarch64_parse_cpu): mcpu implies a default value for mtune. * config/aarch64/aarch64.h (AARCH64_CORE): Handle SCHEDULER_IDENT. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206099 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/aarch64/aarch64-cores.def')
-rw-r--r--gcc/config/aarch64/aarch64-cores.def12
1 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index b631dbed924..1b4a49f7747 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -21,18 +21,18 @@
Before using #include to read this file, define a macro:
- AARCH64_CORE(CORE_NAME, CORE_IDENT, ARCH, FLAGS, COSTS)
+ AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHEDULER_IDENT, ARCH, FLAGS, COSTS)
The CORE_NAME is the name of the core, represented as a string constant.
The CORE_IDENT is the name of the core, represented as an identifier.
+ The SCHEDULER_IDENT is the name of the core for which scheduling decisions
+ will be made, represented as an identifier.
ARCH is the architecture revision implemented by the chip.
FLAGS are the bitwise-or of the traits that apply to that core.
This need not include flags implied by the architecture.
COSTS is the name of the rtx_costs routine to use. */
-/* V8 Architecture Processors.
- This list currently contains example CPUs that implement AArch64, and
- therefore serves as a template for adding more CPUs in the future. */
+/* V8 Architecture Processors. */
-AARCH64_CORE("cortex-a53", cortexa53, 8, AARCH64_FL_FPSIMD, cortexa53)
-AARCH64_CORE("cortex-a57", cortexa15, 8, AARCH64_FL_FPSIMD, generic)
+AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FPSIMD, cortexa53)
+AARCH64_CORE("cortex-a57", cortexa15, cortexa15, 8, AARCH64_FL_FPSIMD, generic)