diff options
author | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-10-25 08:02:28 +0000 |
---|---|---|
committer | bstarynk <bstarynk@138bc75d-0d04-0410-961f-82ee72b054a4> | 2012-10-25 08:02:28 +0000 |
commit | f9a64dbd998f7761e6a06fc71052346d7f76c7f4 (patch) | |
tree | 3608e9a4fa99bbcc7d88dda34b1619a4ac4b122b /gcc/common | |
parent | 29a742dc2ec93b766a342fa6fb65da055c5417fc (diff) | |
download | gcc-f9a64dbd998f7761e6a06fc71052346d7f76c7f4.tar.gz |
2012-10-25 Basile Starynkevitch <basile@starynkevitch.net>
MELT branch merged with trunk rev 192797 using svnmerge.py
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/melt-branch@192798 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/common')
-rw-r--r-- | gcc/common/config/aarch64/aarch64-common.c | 88 |
1 files changed, 88 insertions, 0 deletions
diff --git a/gcc/common/config/aarch64/aarch64-common.c b/gcc/common/config/aarch64/aarch64-common.c new file mode 100644 index 00000000000..bd249e126ee --- /dev/null +++ b/gcc/common/config/aarch64/aarch64-common.c @@ -0,0 +1,88 @@ +/* Common hooks for AArch64. + Copyright (C) 2012 Free Software Foundation, Inc. + Contributed by ARM Ltd. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + You should have received a copy of the GNU General Public License + along with GCC; see the file COPYING3. If not see + <http://www.gnu.org/licenses/>. */ + +#include "config.h" +#include "system.h" +#include "coretypes.h" +#include "tm.h" +#include "tm_p.h" +#include "common/common-target.h" +#include "common/common-target-def.h" +#include "opts.h" +#include "flags.h" + +#ifdef TARGET_BIG_ENDIAN_DEFAULT +#undef TARGET_DEFAULT_TARGET_FLAGS +#define TARGET_DEFAULT_TARGET_FLAGS (MASK_BIG_END) +#endif + +#undef TARGET_HANDLE_OPTION +#define TARGET_HANDLE_OPTION aarch64_handle_option + +#undef TARGET_OPTION_OPTIMIZATION_TABLE +#define TARGET_OPTION_OPTIMIZATION_TABLE aarch_option_optimization_table + +/* Set default optimization options. */ +static const struct default_options aarch_option_optimization_table[] = + { + /* Enable section anchors by default at -O1 or higher. */ + { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 }, + { OPT_LEVELS_NONE, 0, NULL, 0 } + }; + +/* Implement TARGET_HANDLE_OPTION. + This function handles the target specific options for CPU/target selection. + + march wins over mcpu, so when march is defined, mcpu takes the same value, + otherwise march remains undefined. mtune can be used with either march or + mcpu. If march and mcpu are used together, the rightmost option wins. + mtune can be used with either march or mcpu. */ + +static bool +aarch64_handle_option (struct gcc_options *opts, + struct gcc_options *opts_set ATTRIBUTE_UNUSED, + const struct cl_decoded_option *decoded, + location_t loc ATTRIBUTE_UNUSED) +{ + size_t code = decoded->opt_index; + const char *arg = decoded->arg; + + switch (code) + { + case OPT_march_: + opts->x_aarch64_arch_string = arg; + opts->x_aarch64_cpu_string = arg; + return true; + + case OPT_mcpu_: + opts->x_aarch64_cpu_string = arg; + opts->x_aarch64_arch_string = NULL; + return true; + + case OPT_mtune_: + opts->x_aarch64_tune_string = arg; + return true; + + default: + return true; + } +} + +struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER; |