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authorChristophe Lyon <christophe.lyon@linaro.org>2017-01-10 16:05:34 +0100
committerYvan Roux <yvan.roux@linaro.org>2017-01-11 15:12:21 +0000
commit63afa6bb6d877e8d1d6af7ab5923faaa761d5520 (patch)
tree43245de37eab4df444c5b75d00ba2c3270c106d6 /gcc/common
parentdcdf803055ebfe9534762c52f5436b1f4b35ae66 (diff)
downloadgcc-63afa6bb6d877e8d1d6af7ab5923faaa761d5520.tar.gz
gcc/
Backport from trunk r240504. 2016-09-26 Thomas Preud'homme <thomas.preudhomme@arm.com> * tree.h (memmodel_from_int, memmodel_base, is_mm_relaxed, is_mm_consume, is_mm_acquire, is_mm_release, is_mm_acq_rel, is_mm_seq_cst, is_mm_sync): Move to ... * memmodel.h: This. New file. * builtins.c: Include memmodel.h. * optabs.c: Likewise. * tsan.c: Likewise. * config/aarch64/aarch64.c: Likewise. * config/alpha/alpha.c: Likewise. * config/arm/arm.c: Likewise. * config/i386/i386.c: Likewise. * config/ia64/ia64.c: Likewise. * config/mips/mips.c: Likewise. * config/rs6000/rs6000.c: Likewise. * config/sparc/sparc.c: Likewise. * genconditions.c: Include memmodel.h in generated file. * genemit.c: Likewise. * genoutput.c: Likewise. * genpeep.c: Likewise. * genpreds.c: Likewise. * genrecog.c: Likewise. gcc/c-family/ Backport from trunk r240504. 2016-09-26 Thomas Preud'homme <thomas.preudhomme@arm.com> * c-common.c: Include memmodel.h. gcc/ Backport from trunk r241507. 2016-10-25 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/constraints.md (Q constraint): Document its use for Thumb-1. (Pf constraint): New constraint for relaxed, consume or relaxed memory models. * config/arm/sync.md (atomic_load<mode>): Add new ARMv8-M Baseline only alternatives to allow any register when memory model matches Pf and thus lda is used, but only low registers otherwise. Use unpredicated output template for Thumb-1 targets. (atomic_store<mode>): Likewise for stl. (arm_load_exclusive<mode>): Add new ARMv8-M Baseline only alternative whose output template does not have predication. (arm_load_acquire_exclusive<mode>): Likewise. (arm_load_exclusivesi): Likewise. (arm_load_acquire_exclusivesi): Likewise. (arm_store_release_exclusive<mode>): Likewise. (arm_store_exclusive<mode>): Use unpredicated output template for Thumb-1 targets. gcc/ Backport from trunk r241577. 2016-10-26 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (arm_expand_compare_and_swap): Add new bdst local variable. Add the new parameter to the insn generator. Set that parameter to be CC flag for 32-bit targets, bval otherwise. Set the return value from the negation of that parameter for Thumb-1, keeping the logic unchanged otherwise except for using bdst as the destination register of the compare_and_swap insn. (arm_split_compare_and_swap): Add explanation about how is the value returned to the function comment. Rename scratch variable to neg_bval. Adapt initialization of variables holding operands to the new operand numbers. Use return register to hold result of store exclusive for Thumb-1, scratch register otherwise. Construct the appropriate cbranch for Thumb-1 targets, keeping the logic unchanged for 32-bit targets. Guard Z flag setting to restrict to 32bit targets. Use gen_cbranchsi4 rather than hand-written conditional branch to loop for strongly ordered compare_and_swap. * config/arm/predicates.md (cc_register_operand): New predicate. * config/arm/sync.md (atomic_compare_and_swap<mode>_1): Use a match_operand with the new predicate to accept either the CC flag or a destination register for the boolean return value, restricting it to CC flag only via constraint. Adapt operand numbers accordingly. gcc/ Backport from trunk r241578. 2016-10-26 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/sync.md (atomic_compare_and_swap<mode>_1): Add new ARMv8-M Baseline only alternatives to (i) hold store atomic success value in a return register rather than a scratch register, (ii) use a low register for it and to (iii) ensure the cbranchsi insn generated by the split respect the constraints of Thumb-1 cbranchsi4_insn and cbranchsi4_scratch. * config/arm/thumb1.md (cbranchsi4_insn): Add comment to indicate constraints must match those in atomic_compare_and_swap. (cbranchsi4_scratch): Likewise. gcc/ Backport from trunk r241614. 2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (arm_split_atomic_op): Add function comment. Add logic to to decide whether to copy over old value to register for new value. * config/arm/sync.md: Add comments explaning why mode and code attribute are not defined in iterators.md (thumb1_atomic_op_str): New code attribute. (thumb1_atomic_newop_str): Likewise. (thumb1_atomic_fetch_op_str): Likewise. (thumb1_atomic_fetch_newop_str): Likewise. (thumb1_atomic_fetch_oldop_str): Likewise. (atomic_exchange<mode>): Add new ARMv8-M Baseline only alternatives to mirror the more restrictive constraints of the Thumb-1 insns after split compared to Thumb-2 counterpart insns. (atomic_<sync_optab><mode>): Likewise. Add comment to keep constraints in sync with non atomic version. (atomic_nand<mode>): Likewise. (atomic_fetch_<sync_optab><mode>): Likewise. (atomic_fetch_nand<mode>): Likewise. (atomic_<sync_optab>_fetch<mode>): Likewise. (atomic_nand_fetch<mode>): Likewise. * config/arm/thumb1.md (thumb1_addsi3): Add comment to keep contraint in sync with atomic version. (thumb1_subsi3_insn): Likewise. (thumb1_andsi3_insn): Likewise. (thumb1_iorsi3_insn): Likewise. (thumb1_xorsi3_insn): Likewise. gcc/ Backport from trunk r241615. 2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.h (TARGET_HAVE_LDREX): Define for ARMv8-M Baseline. (TARGET_HAVE_LDREXBH): Likewise. (TARGET_HAVE_LDACQ): Likewise. gcc/testsuite/ Backport from trunk r241615. 2016-10-27 Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/atomic-comp-swap-release-acquire-3.c: New test. * gcc.target/arm/atomic-op-acq_rel-3.c: Likewise. * gcc.target/arm/atomic-op-acquire-3.c: Likewise. * gcc.target/arm/atomic-op-char-3.c: Likewise. * gcc.target/arm/atomic-op-consume-3.c: Likewise. * gcc.target/arm/atomic-op-int-3.c: Likewise. * gcc.target/arm/atomic-op-relaxed-3.c: Likewise. * gcc.target/arm/atomic-op-release-3.c: Likewise. * gcc.target/arm/atomic-op-seq_cst-3.c: Likewise. * gcc.target/arm/atomic-op-short-3.c: Likewise. gcc/ Backport from trunk r241848. 2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm-arches.def (armv8-m.base): Set Cortex-M23 as representative core for this architecture. * config/arm/arm-cores.def (cortex-m23): Define new processor. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Likewise. * config/arm/arm.c (arm_v6m_tune): Add Cortex-M23 to the list of cores this tuning parameters apply to in the comment. * config/arm/bpabi.h (BE8_LINK_SPEC): Add Cortex-M23 to the list of valid -mcpu options. * doc/invoke.texi (ARM Options): Document new Cortex-M23 processor. gcc/ Backport from trunk r241849. 2016-11-04 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm-arches.def (armv8-m.main+dsp): Set Cortex-M33 as representative core for this architecture. * config/arm/arm-cores.def (cortex-m33): Define new processor. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Likewise. * config/arm/bpabi.h (BE8_LINK_SPEC): Add Cortex-M33 to the list of valid -mcpu options. * doc/invoke.texi (ARM Options): Document new Cortex-M33 processor. gcc/ Backport from trunk r242596. 2016-11-18 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm-protos.h (FL_NONE, FL_ANY, FL_CO_PROC, FL_ARCH3M, FL_MODE26, FL_MODE32, FL_ARCH4, FL_ARCH5, FL_THUMB, FL_LDSCHED, FL_STRONG, FL_ARCH5E, FL_XSCALE, FL_ARCH6, FL_VFPV2, FL_WBUF, FL_ARCH6K, FL_THUMB2, FL_NOTM, FL_THUMB_DIV, FL_VFPV3, FL_NEON, FL_ARCH7EM, FL_ARCH7, FL_ARM_DIV, FL_ARCH8, FL_CRC32, FL_SMALLMUL, FL_NO_VOLATILE_CE, FL_IWMMXT, FL_IWMMXT2, FL_ARCH6KZ, FL2_ARCH8_1, FL2_ARCH8_2, FL2_FP16INST): Reindent comment, add final dot when missing and make value unsigned. (arm_feature_set): Use unsigned entries instead of unsigned long. gcc/ Backport from trunk r242597. 2016-11-18 Terry Guo <terry.guo@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * common/config/arm/arm-common.c (arm_target_thumb_only): New function. * config/arm/arm-opts.h: Include arm-flags.h. (struct arm_arch_core_flag): Define. (arm_arch_core_flags): Define. * config/arm/arm-protos.h: Include arm-flags.h (FL_NONE, FL_ANY, FL_CO_PROC, FL_ARCH3M, FL_MODE26, FL_MODE32, FL_ARCH4, FL_ARCH5, FL_THUMB, FL_LDSCHED, FL_STRONG, FL_ARCH5E, FL_XSCALE, FL_ARCH6, FL_VFPV2, FL_WBUF, FL_ARCH6K, FL_THUMB2, FL_NOTM, FL_THUMB_DIV, FL_VFPV3, FL_NEON, FL_ARCH7EM, FL_ARCH7, FL_ARM_DIV, FL_ARCH8, FL_CRC32, FL_SMALLMUL, FL_NO_VOLATILE_CE, FL_IWMMXT, FL_IWMMXT2, FL_ARCH6KZ, FL2_ARCH8_1, FL2_ARCH8_2, FL2_FP16INST, FL_TUNE, FL_FOR_ARCH2, FL_FOR_ARCH3, FL_FOR_ARCH3M, FL_FOR_ARCH4, FL_FOR_ARCH4T, FL_FOR_ARCH5, FL_FOR_ARCH5T, FL_FOR_ARCH5E, FL_FOR_ARCH5TE, FL_FOR_ARCH5TEJ, FL_FOR_ARCH6, FL_FOR_ARCH6J, FL_FOR_ARCH6K, FL_FOR_ARCH6Z, FL_FOR_ARCH6ZK, FL_FOR_ARCH6KZ, FL_FOR_ARCH6T2, FL_FOR_ARCH6M, FL_FOR_ARCH7, FL_FOR_ARCH7A, FL_FOR_ARCH7VE, FL_FOR_ARCH7R, FL_FOR_ARCH7M, FL_FOR_ARCH7EM, FL_FOR_ARCH8A, FL2_FOR_ARCH8_1A, FL2_FOR_ARCH8_2A, FL_FOR_ARCH8M_BASE, FL_FOR_ARCH8M_MAIN, arm_feature_set, ARM_FSET_MAKE, ARM_FSET_MAKE_CPU1, ARM_FSET_MAKE_CPU2, ARM_FSET_CPU1, ARM_FSET_CPU2, ARM_FSET_EMPTY, ARM_FSET_ANY, ARM_FSET_HAS_CPU1, ARM_FSET_HAS_CPU2, ARM_FSET_HAS_CPU, ARM_FSET_ADD_CPU1, ARM_FSET_ADD_CPU2, ARM_FSET_DEL_CPU1, ARM_FSET_DEL_CPU2, ARM_FSET_UNION, ARM_FSET_INTER, ARM_FSET_XOR, ARM_FSET_EXCLUDE, ARM_FSET_IS_EMPTY, ARM_FSET_CPU_SUBSET): Move to ... * config/arm/arm-flags.h: This new file. * config/arm/arm.h (TARGET_MODE_SPEC_FUNCTIONS): Define. (EXTRA_SPEC_FUNCTIONS): Add TARGET_MODE_SPEC_FUNCTIONS to its value. (TARGET_MODE_SPECS): Define. (DRIVER_SELF_SPECS): Add TARGET_MODE_SPECS to its value. gcc/testsuite/ Backport from trunk r242597. 2016-11-18 Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/optional_thumb-1.c: New test. * gcc.target/arm/optional_thumb-2.c: New test. * gcc.target/arm/optional_thumb-3.c: New test. gcc/ Backport from trunk r242696. 2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com> * config.gcc: Allow new rmprofile value for configure option --with-multilib-list. * config/arm/t-rmprofile: New file. * doc/install.texi (--with-multilib-list): Document new rmprofile value for ARM. gcc/testsuite/ Backport from trunk r243013. 2016-11-30 Thomas Preud'homme <thomas.preudhomme@arm.com> * lib/target-supports.exp (add_options_for_arm_arch_v6m): Add -mfloat-abi=soft option. (add_options_for_arm_arch_v8m_base): Likewise. Reindent containing foreach loop. gcc/ Backport from trunk r243015. 2016-11-30 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/t-rmprofile: Add mappings for Cortex-M23 and Cortex-M33. gcc/ Backport from trunk r243187. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config.gcc (extra_headers): Added arm_cmse.h. * config/arm/arm-arches.def (ARM_ARCH): (armv8-m): Add FL2_CMSE. (armv8-m.main): Likewise. (armv8-m.main+dsp): Likewise. * config/arm/arm-c.c (arm_cpu_builtins): Added __ARM_FEATURE_CMSE macro. * config/arm/arm-flags.h: Define FL2_CMSE. * config/arm.c (arm_arch_cmse): New. (arm_option_override): New error for unsupported cmse target. * config/arm/arm.h (arm_arch_cmse): New. * config/arm/arm.opt (mcmse): New. * config/arm/arm_cmse.h: New file. * doc/invoke.texi (ARM Options): Add -mcmse. * doc/sourcebuild.texi (arm_cmse_ok): Add new effective target. * doc/extend.texi: Add ARMv8-M Security Extensions entry. gcc/testsuite/ Backport from trunk r243187. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse.exp: New. * gcc.target/arm/cmse/cmse-1.c: New. * gcc.target/arm/cmse/cmse-12.c: New. * lib/target-supports.exp (check_effective_target_arm_cmse_ok): New. libgcc/ Backport from trunk r243187. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/t-arm (HAVE_CMSE): New. * config/arm/cmse.c: New. gcc/ Backport from trunk r243188. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New. (arm_attribute_table): Added cmse_nonsecure_entry (arm_compute_func_type): Handle cmse_nonsecure_entry. (cmse_func_args_or_return_in_stack): New. (arm_handle_cmse_nonsecure_entry): New. * config/arm/arm.h (ARM_FT_CMSE_ENTRY): New macro define. (IS_CMSE_ENTRY): Likewise. * doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute. gcc/testsuite/ Backport from trunk r243188. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse-3.c: New. gcc/ Backport from trunk r243189. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (use_return_insn): Change to return with bxns when cmse_nonsecure_entry. (output_return_instruction): Likewise. (arm_output_function_prologue): Likewise. (thumb_pop): Likewise. (thumb_exit): Likewise. (thumb2_expand_return): Assert that entry functions always have simple returns. (arm_expand_epilogue): Handle entry functions. (arm_function_ok_for_sibcall): Disable sibcall for entry functions. (arm_asm_declare_function_name): New. * config/arm/arm-protos.h (arm_asm_declare_function_name): New. * config/arm/elf.h (ASM_DECLARE_FUNCTION_NAME): Redefine to use arm_asm_declare_function_name. gcc/testsuite/ Backport from trunk r243189. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse-4.c: New. * gcc.target/arm/cmse/cmse-9.c: New. * gcc.target/arm/cmse/cmse-10.c: New. gcc/ Backport from trunk r243190. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (output_return_instruction): Clear registers. (thumb2_expand_return): Likewise. (thumb1_expand_epilogue): Likewise. (thumb_exit): Likewise. (arm_expand_epilogue): Likewise. (cmse_nonsecure_entry_clear_before_return): New. (comp_not_to_clear_mask_str_un): New. (compute_not_to_clear_mask): New. * config/arm/thumb1.md (*epilogue_insns): Change length attribute. * config/arm/thumb2.md (*thumb2_return): Disable for cmse_nonsecure_entry functions. (*thumb2_cmse_entry_return): Duplicate thumb2_return pattern for cmse_nonsecure_entry functions. gcc/testsuite/ Backport from trunk r243190. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse.exp: Test different multilibs separate. * gcc.target/arm/cmse/struct-1.c: New. * gcc.target/arm/cmse/bitfield-1.c: New. * gcc.target/arm/cmse/bitfield-2.c: New. * gcc.target/arm/cmse/bitfield-3.c: New. * gcc.target/arm/cmse/baseline/cmse-2.c: New. * gcc.target/arm/cmse/baseline/softfp.c: New. * gcc.target/arm/cmse/mainline/soft/cmse-5.c: New. * gcc.target/arm/cmse/mainline/hard/cmse-5.c: New. * gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: New. * gcc.target/arm/cmse/mainline/softfp/cmse-5.c: New. * gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: New. gcc/ Backport from trunk r243191. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (gimplify.h): New include. (arm_handle_cmse_nonsecure_call): New. (arm_attribute_table): Added cmse_nonsecure_call. (arm_comp_type_attributes): Deny compatibility of function types with without the cmse_nonsecure_call attribute. * doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute. gcc/testsuite/ Backport from trunk r243191. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse-3.c: Add tests. * gcc.target/arm/cmse/cmse-4.c: Add tests. * gcc.target/arm/cmse/cmse-15.c: New. gcc/ Backport from trunk r243192. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (detect_cmse_nonsecure_call): New. (cmse_nonsecure_call_clear_caller_saved): New. (arm_reorg): Use cmse_nonsecure_call_clear_caller_saved. (arm_function_ok_for_sibcall): Disable sibcalls for cmse_nonsecure_call. * config/arm/arm-protos.h (detect_cmse_nonsecure_call): New. * config/arm/arm.md (call): Handle cmse_nonsecure_entry. (call_value): Likewise. (nonsecure_call_internal): New. (nonsecure_call_value_internal): New. * config/arm/thumb1.md (*nonsecure_call_reg_thumb1_v5): New. (*nonsecure_call_value_reg_thumb1_v5): New. * config/arm/thumb2.md (*nonsecure_call_reg_thumb2): New. (*nonsecure_call_value_reg_thumb2): New. * config/arm/unspecs.md (UNSPEC_NONSECURE_MEM): New. gcc/testsuite/ Backport from trunk r243192. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse.exp: Run tests in mainline dir. * gcc.target/arm/cmse/cmse-9.c: Added some extra tests. * gcc.target/arm/cmse/cmse-14.c: New. * gcc.target/arm/cmse/baseline/bitfield-4.c: New. * gcc.target/arm/cmse/baseline/bitfield-5.c: New. * gcc.target/arm/cmse/baseline/bitfield-6.c: New. * gcc.target/arm/cmse/baseline/bitfield-7.c: New. * gcc.target/arm/cmse/baseline/bitfield-8.c: New. * gcc.target/arm/cmse/baseline/bitfield-9.c: New. * gcc.target/arm/cmse/baseline/bitfield-and-union-1.c: New. * gcc.target/arm/cmse/baseline/cmse-11.c: New. * gcc.target/arm/cmse/baseline/cmse-13.c: New. * gcc.target/arm/cmse/baseline/cmse-6.c: New. * gcc.target/arm/cmse/baseline/union-1.c: New. * gcc.target/arm/cmse/baseline/union-2.c: New. * gcc.target/arm/cmse/mainline/bitfield-4.c: New. * gcc.target/arm/cmse/mainline/bitfield-5.c: New. * gcc.target/arm/cmse/mainline/bitfield-6.c: New. * gcc.target/arm/cmse/mainline/bitfield-7.c: New. * gcc.target/arm/cmse/mainline/bitfield-8.c: New. * gcc.target/arm/cmse/mainline/bitfield-9.c: New. * gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: New. * gcc.target/arm/cmse/mainline/union-1.c: New. * gcc.target/arm/cmse/mainline/union-2.c: New. * gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: New. * gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: New. * gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: New. * gcc.target/arm/cmse/mainline/hard/cmse-13.c: New. * gcc.target/arm/cmse/mainline/hard/cmse-7.c: New. * gcc.target/arm/cmse/mainline/hard/cmse-8.c: New. * gcc.target/arm/cmse/mainline/soft/cmse-13.c: New. * gcc.target/arm/cmse/mainline/soft/cmse-7.c: New. * gcc.target/arm/cmse/mainline/soft/cmse-8.c: New. * gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: New. * gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: New. * gcc.target/arm/cmse/mainline/softfp/cmse-13.c: New. * gcc.target/arm/cmse/mainline/softfp/cmse-7.c: New. * gcc.target/arm/cmse/mainline/softfp/cmse-8.c: New. libgcc/ Backport from trunk r243192. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/cmse_nonsecure_call.S: New. * config/arm/t-arm: Compile cmse_nonsecure_call.S gcc/ Backport from trunk r243193. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm-builtins.c (arm_builtins): Define ARM_BUILTIN_CMSE_NONSECURE_CALLER. (bdesc_2arg): Add line for cmse_nonsecure_caller. (arm_init_builtins): Handle cmse_nonsecure_caller. (arm_expand_builtin): Likewise. * config/arm/arm_cmse.h (cmse_nonsecure_caller): New. gcc/testsuite/ Backport from trunk r243193. 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse-1.c: Add test for cmse_nonsecure_caller. gcc/ Backport from trunk r243216. 2016-12-01 Jeff Law <law@redhat.com> * config/arm/arm.c (arm_handle_cmse_nonsecure_call): Remove unused variable main_variant. Change-Id: Ibe821b25c811c214c51d5cbaceb4ea960c619633
Diffstat (limited to 'gcc/common')
-rw-r--r--gcc/common/config/arm/arm-common.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/gcc/common/config/arm/arm-common.c b/gcc/common/config/arm/arm-common.c
index a9abd6b026e..29ae0c35dd0 100644
--- a/gcc/common/config/arm/arm-common.c
+++ b/gcc/common/config/arm/arm-common.c
@@ -97,6 +97,29 @@ arm_rewrite_mcpu (int argc, const char **argv)
return arm_rewrite_selected_cpu (argv[argc - 1]);
}
+/* Called by the driver to check whether the target denoted by current
+ command line options is a Thumb-only target. ARGV is an array of
+ -march and -mcpu values (ie. it contains the rhs after the equal
+ sign) and we use the last one of them to make a decision. The
+ number of elements in ARGV is given in ARGC. */
+const char *
+arm_target_thumb_only (int argc, const char **argv)
+{
+ unsigned int opt;
+
+ if (argc)
+ {
+ for (opt = 0; opt < (ARRAY_SIZE (arm_arch_core_flags)); opt++)
+ if ((strcmp (argv[argc - 1], arm_arch_core_flags[opt].name) == 0)
+ && !ARM_FSET_HAS_CPU1(arm_arch_core_flags[opt].flags, FL_NOTM))
+ return "-mthumb";
+
+ return NULL;
+ }
+ else
+ return NULL;
+}
+
#undef ARM_CPU_NAME_LENGTH