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author | kyukhin <kyukhin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-12-31 11:39:07 +0000 |
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committer | kyukhin <kyukhin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-12-31 11:39:07 +0000 |
commit | fc975a409013babbdcbb4c2e3e195ca927dc364d (patch) | |
tree | f9ef1cc75271737803252598e26bf8159b6c758a /gcc/common | |
parent | e0b3f4f8a639c665840b775df005fb38b820ec20 (diff) | |
download | gcc-fc975a409013babbdcbb4c2e3e195ca927dc364d.tar.gz |
gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_SHA_SET): New.
(OPTION_MASK_ISA_SHA_UNSET): Ditto.
(ix86_handle_option): Handle OPT_msha.
* config.gcc (extra_headers): Add shaintrin.h.
* config/i386/cpuid.h (bit_SHA): New.
* config/i386/driver-i386.c (host_detect_local_cpu): Detect SHA
instructions.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
OPTION_MASK_ISA_SHA.
* config/i386/i386.c (ix86_target_string): Add -msha.
(ix86_option_override_internal): Add PTA_SHA.
(ix86_valid_target_attribute_inner_p): Handle OPT_msha.
(enum ix86_builtins): Add IX86_BUILTIN_SHA1MSG1,
IX86_BUILTIN_SHA1MSG2, IX86_BUILTIN_SHA1NEXTE, IX86_BUILTIN_SHA1RNDS4,
IX86_BUILTIN_SHA256MSG1, IX86_BUILTIN_SHA256MSG2,
IX86_BUILTIN_SHA256RNDS2.
(bdesc_args): Add BUILTINS defined above.
(ix86_init_mmx_sse_builtins): Add __builtin_ia32_sha1msg1,
__builtin_ia32_sha1msg2, __builtin_ia32_sha1nexte,
__builtin_ia32_sha1rnds4, __builtin_ia32_sha256msg1,
__builtin_ia32_sha256msg2, __builtin_ia32_sha256rnds2.
(ix86_expand_args_builtin): Handle V4SI_FTYPE_V4SI_V4SI_V4SI, add
warning for CODE_FOR_sha1rnds4.
* config/i386/i386.h (TARGET_SHA): New.
(TARGET_SHA_P): Ditto.
* config/i386/i386.opt (-msha): Document it.
* config/i386/immintrin.h: Add shaintrin.h.
* config/i386/shaintrin.h: New.
* config/i386/sse.md (unspec): Add UNSPEC_SHA1MSG1, UNSPEC_SHA1MSG2,
UNSPEC_SHA1NEXTE, UNSPEC_SHA1RNDS4, UNSPEC_SHA256MSG1,
UNSPEC_SHA256MSG2, UNSPEC_SHA256RNDS2.
(sha1msg1): New.
(sha1msg2): Ditto.
(sha1nexte): Ditto.
(sha1rnds4): Ditto.
(sha256msg1): Ditto.
(sha256msg2): Ditto.
(sha256rnds2): Ditto.
* doc/invoke.texi: Add -msha.
testsuite/
* gcc.target/i386/avx-1.c: Add define for __builtin_ia32_sha1rnds4.
* gcc.target/i386/i386.exp (check_effective_target_sha): New.
* gcc.target/i386/sha-check.h: New file.
* gcc.target/i386/sha1msg1-1.c: Ditto.
* gcc.target/i386/sha1msg1-2.c: Ditto.
* gcc.target/i386/sha1msg2-1.c: Ditto.
* gcc.target/i386/sha1msg2-2.c: Ditto.
* gcc.target/i386/sha1nexte-1: Ditto.
* gcc.target/i386/sha1nexte-2: Ditto.
* gcc.target/i386/sha1rnds4-1.c: Ditto.
* gcc.target/i386/sha1rnds4-2.c: Ditto.
* gcc.target/i386/sha256msg1-1.c: Ditto.
* gcc.target/i386/sha256msg1-2.c: Ditto.
* gcc.target/i386/sha256msg2-1.c: Ditto.
* gcc.target/i386/sha256msg2-2.c: Ditto.
* gcc.target/i386/sha256rnds2-1.c: Ditto.
* gcc.target/i386/sha256rnds2-2.c: Ditto.
* gcc.target/i386/sse-13.c: Add __builtin_ia32_sha1rnds4.
* gcc.target/i386/sse-14.c: Add _mm_sha1rnds4_epu32.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Add __builtin_ia32_sha1rnds4.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206263 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/common')
-rw-r--r-- | gcc/common/config/i386/i386-common.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index e07479da28c..3d87a62f0f7 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -84,9 +84,11 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_LWP_SET \ OPTION_MASK_ISA_LWP -/* AES and PCLMUL need SSE2 because they use xmm registers */ +/* AES, SHA and PCLMUL need SSE2 because they use xmm registers. */ #define OPTION_MASK_ISA_AES_SET \ (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2_SET) +#define OPTION_MASK_ISA_SHA_SET \ + (OPTION_MASK_ISA_SHA | OPTION_MASK_ISA_SSE2_SET) #define OPTION_MASK_ISA_PCLMUL_SET \ (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2_SET) @@ -166,6 +168,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_LWP_UNSET OPTION_MASK_ISA_LWP #define OPTION_MASK_ISA_AES_UNSET OPTION_MASK_ISA_AES +#define OPTION_MASK_ISA_SHA_UNSET OPTION_MASK_ISA_SHA #define OPTION_MASK_ISA_PCLMUL_UNSET OPTION_MASK_ISA_PCLMUL #define OPTION_MASK_ISA_ABM_UNSET OPTION_MASK_ISA_ABM #define OPTION_MASK_ISA_BMI_UNSET OPTION_MASK_ISA_BMI @@ -611,6 +614,19 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_msha: + if (value) + { + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_SHA_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHA_SET; + } + else + { + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_SHA_UNSET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_SHA_UNSET; + } + return true; + case OPT_mpclmul: if (value) { |