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| author | Monk Chiang <monk.chiang@sifive.com> | 2022-10-25 14:17:33 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2022-10-26 16:37:01 +0800 |
| commit | 86654b2cc167b540f4f144549b80748ce0054729 (patch) | |
| tree | e3cb8a1d914c9bbd919ee98f1ea86a17ffd311d9 /gcc/common | |
| parent | 0ef04aa86a4c7a7535ef1fac02c2457282bc9172 (diff) | |
| download | gcc-86654b2cc167b540f4f144549b80748ce0054729.tar.gz | |
RISC-V: Recognized Svinval and Svnapot extensions
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (riscv_ext_version_table):
Add svinval and svnapot extension.
(riscv_ext_flag_table): Ditto.
* config/riscv/riscv-opts.h (MASK_SVINVAL): New.
(MASK_SVNAPOT): Ditto.
(TARGET_SVINVAL): Ditto.
(TARGET_SVNAPOT): Ditto.
* config/riscv/riscv.opt (riscv_sv_subext): New.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/predef-24.c:New.
* gcc.target/riscv/predef-25.c:New.
Diffstat (limited to 'gcc/common')
| -rw-r--r-- | gcc/common/config/riscv/riscv-common.cc | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gcc/common/config/riscv/riscv-common.cc b/gcc/common/config/riscv/riscv-common.cc index d77020bb6db..bd356ce2093 100644 --- a/gcc/common/config/riscv/riscv-common.cc +++ b/gcc/common/config/riscv/riscv-common.cc @@ -204,6 +204,9 @@ static const struct riscv_ext_version riscv_ext_version_table[] = {"zmmul", ISA_SPEC_CLASS_NONE, 1, 0}, + {"svinval", ISA_SPEC_CLASS_NONE, 1, 0}, + {"svnapot", ISA_SPEC_CLASS_NONE, 1, 0}, + /* Terminate the list. */ {NULL, ISA_SPEC_CLASS_NONE, 0, 0} }; @@ -1219,6 +1222,9 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] = {"zmmul", &gcc_options::x_riscv_zm_subext, MASK_ZMMUL}, + {"svinval", &gcc_options::x_riscv_sv_subext, MASK_SVINVAL}, + {"svnapot", &gcc_options::x_riscv_sv_subext, MASK_SVNAPOT}, + {NULL, NULL, 0} }; |