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authorvmakarov <vmakarov@138bc75d-0d04-0410-961f-82ee72b054a4>2008-12-09 21:25:11 +0000
committervmakarov <vmakarov@138bc75d-0d04-0410-961f-82ee72b054a4>2008-12-09 21:25:11 +0000
commit14792f4e09135749d6631d113f0e73185ba50226 (patch)
tree42be312c545d91eee361dc8d399923279541e6a2 /gcc/cfgloopanal.c
parent58d657fa30f9a8f4c020bae68bf141867aa5ef55 (diff)
downloadgcc-14792f4e09135749d6631d113f0e73185ba50226.tar.gz
2008-12-09 Vladimir Makarov <vmakarov@redhat.com>
* doc/tm.texi (TARGET_IRA_COVER_CLASSES): Modify description. * doc/invoke.texi (-fira-region): Describe new option. (-fira-algorithm): Change the values. * ira-conflicts.c (build_conflict_bit_table, build_allocno_conflicts): Use ira_reg_classes_intersect_p. (ira_build_conflicts): Use flag flag_ira_region instead of flag_ira_algorithm. Prohibit usage of callee-saved likely spilled base registers for allocnos crossing calls. * flags.h (enum ira_algorithm): Redefine. (enum ira_region): New. (flag_ira_region): New. * cfgloopanal.c (estimate_reg_pressure_cost): Use flag_ira_region instead of flag_ira_algorithm. * toplev.c (flag_ira_algorithm): Change the initial value. (flag_ira_region): New. * ira-int.h (ira_reg_classes_intersect_p, ira_reg_class_super_classes): New. * ira-color.c (update_copy_costs): Use ira_reg_classes_intersect_p. Use right class to find hard reg index. (update_conflict_hard_regno_costs): Ditto. Add a new parameter. (assign_hard_reg): Ditto. Pass additional argument to update_conflict_hard_regno_costs. Do not uncoalesce for priority coloring. (allocno_priorities, setup_allocno_priorities, allocno_priority_compare_func): Move before color_allocnos. (color_allocnos): Add priority coloring. Use flag flag_ira_region instead of flag_ira_algorithm. (move_spill_restore): Check classes of the same reg allocno from different regions. (update_curr_costs): Use ira_reg_classes_intersect_p. (ira_reassign_conflict_allocnos): Ditto. * opts.c (decode_options): Always set up flag_ira. Set up flag_ira_algorithm. Warn CB can not be used for architecture. (common_handle_option): Modify code for -fira-algorithm. Add code to process -fira-region. * ira-lives.c (update_allocno_pressure_excess_length): Process superclasses too. (set_allocno_live, clear_allocno_live, mark_reg_live, mark_reg_dead, process_bb_node_lives): Ditto. * ira-emit.c (ira_emit): Fix insn codes. * ira-build.c (propagate_allocno_info): Use flag flag_ira_region instead of flag_ira_algorithm. (allocno_range_compare_func): Ignore classes for priority coloring. (setup_min_max_conflict_allocno_ids): Ditto. (ira_flattening): Use ira_reg_classes_intersect_p. * genpreds.c (write_enum_constraint_num): Output CONSTRAINT__LIMIT. * common.opt (fira-algorithm): Modify. (fira-region): New. * ira.c (setup_class_hard_regs): Initialize. (setup_cover_and_important_classes): Modify code setting class related info for priority coloring. (setup_class_translate): Ditto. (ira_reg_classes_intersect_p, ira_reg_class_super_classes): New. (setup_reg_class_intersect_union): Rename to setup_reg_class_relations. Add code for setting up new variables. (find_reg_class_closure): Do not check targetm.ira_cover_classes. (ira): Use flag flag_ira_region instead of flag_ira_algorithm. * ira-costs.c (common_classes): New. (print_costs): Use flag flag_ira_region instead of flag_ira_algorithm. (find_allocno_class_costs): Ditto. Use common_classes. Translate alt_class. (ira_costs): Allocate/deallocate common_classes. * config/m32c/m32.h (REG_ALLOC_ORDER): Add reg 19. (REG_CLASS_CONTENTS, reg_class, REG_CLASS_NAMES): New entries for R02A_REGS. * reload1.c (choose_reload_regs): Use MODE_INT for partial ints in smallest_mode_for_size. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@142610 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/cfgloopanal.c')
-rw-r--r--gcc/cfgloopanal.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/cfgloopanal.c b/gcc/cfgloopanal.c
index d59fa2fb505..88c5e956264 100644
--- a/gcc/cfgloopanal.c
+++ b/gcc/cfgloopanal.c
@@ -396,8 +396,8 @@ estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed)
one. */
cost = target_spill_cost [speed] * n_new;
- if (optimize && flag_ira && (flag_ira_algorithm == IRA_ALGORITHM_REGIONAL
- || flag_ira_algorithm == IRA_ALGORITHM_MIXED)
+ if (optimize && flag_ira && (flag_ira_region == IRA_REGION_ALL
+ || flag_ira_region == IRA_REGION_MIXED)
&& number_of_loops () <= (unsigned) IRA_MAX_LOOPS_NUM)
/* IRA regional allocation deals with high register pressure
better. So decrease the cost (to do more accurate the cost