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author | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-06-10 16:32:45 +0000 |
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committer | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-06-10 16:32:45 +0000 |
commit | 0c7f52420edf408f531d6a18f952440eaf74a05f (patch) | |
tree | b6731a46c8b99043d03fbda9812dc896be80aba5 /gcc/caller-save.c | |
parent | 06662b367c12ed91cdc69c699dfb4c927f5f8543 (diff) | |
download | gcc-0c7f52420edf408f531d6a18f952440eaf74a05f.tar.gz |
* alias.c (static_reg_base_value): New to hold RTL for
items allocated once per function for the aliasing code.
(init_alias_once_per_function): Initialize static_reg_base_value.
(init_alias_analysis): Avoid throw-away allocations of RTL by
using pre-computed values in static_reg_base_value.
* function.c (prepare_function_start): Call
init_alias_once_per_function appropriately.
* rtl.h (init_alias_once_per_function): Declare.
* caller-save (init_caller_save): Restructure slightly to
avoid lots of silly RTL generation.
* expr.c (init_expr_once): Likewise.
* reload1.c (reload_cse_regs_1): Allocate throw-away register
RTL object here. Pass it into children.
(reload_cse_simplify_operands): Use passed-in register RTL
object.
(reload_cse_simplify): Pass through throw-away register
RTL object.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@54442 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/caller-save.c')
-rw-r--r-- | gcc/caller-save.c | 27 |
1 files changed, 20 insertions, 7 deletions
diff --git a/gcc/caller-save.c b/gcc/caller-save.c index 87a13dc0fad..920bafd241b 100644 --- a/gcc/caller-save.c +++ b/gcc/caller-save.c @@ -115,6 +115,9 @@ init_caller_save () rtx address; int i, j; enum machine_mode mode; + rtx savepat, restpat; + rtx test_reg, test_mem; + rtx saveinsn, restinsn; /* First find all the registers that we need to deal with and all the modes that they can have. If we can't find a mode to use, @@ -179,7 +182,17 @@ init_caller_save () address = addr_reg; /* Next we try to form an insn to save and restore the register. We - see if such an insn is recognized and meets its constraints. */ + see if such an insn is recognized and meets its constraints. + + To avoid lots of unnecessary RTL allocation, we construct all the RTL + once, then modify the memory and register operands in-place. */ + + test_reg = gen_rtx_REG (VOIDmode, 0); + test_mem = gen_rtx_MEM (VOIDmode, address); + savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg); + restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem); + saveinsn = emit_insn (savepat); + restinsn = emit_insn (restpat); start_sequence (); @@ -187,14 +200,14 @@ init_caller_save () for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++) if (HARD_REGNO_MODE_OK (i, mode)) { - rtx mem = gen_rtx_MEM (mode, address); - rtx reg = gen_rtx_REG (mode, i); - rtx savepat = gen_rtx_SET (VOIDmode, mem, reg); - rtx restpat = gen_rtx_SET (VOIDmode, reg, mem); - rtx saveinsn = emit_insn (savepat); - rtx restinsn = emit_insn (restpat); int ok; + /* Update the register number and modes of the register + and memory operand. */ + REGNO (test_reg) = i; + PUT_MODE (test_reg, mode); + PUT_MODE (test_mem, mode); + reg_save_code[i][mode] = recog_memoized (saveinsn); reg_restore_code[i][mode] = recog_memoized (restinsn); |