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| author | Peter Bergner <bergner@vnet.ibm.com> | 2016-06-27 20:28:28 -0500 |
|---|---|---|
| committer | Peter Bergner <bergner@gcc.gnu.org> | 2016-06-27 20:28:28 -0500 |
| commit | 0dc47331b8bbb633fc3783b0d5dc9cec19b2c6b0 (patch) | |
| tree | 8b84ddf3424e979b04f60e7c78a033030c2fd33e /COPYING3 | |
| parent | f0388d837d1e02524f2a807e1679e760da7146a3 (diff) | |
| download | gcc-0dc47331b8bbb633fc3783b0d5dc9cec19b2c6b0.tar.gz | |
re PR target/71656 (ICE in reload when generating code for -mcpu=power9 -mpower9-dform-vector)
gcc/
PR target/71656
* config/rs6000/rs6000-cpus.def (ISA_3_0_MASKS_SERVER): Add
OPTION_MASK_P9_DFORM_VECTOR.
* config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
disable -mpower9-dform-vector when using reload.
(quad_address_p): Remove 'gpr_p' argument and all associated code.
New 'strict' argument. Update all callers. Add strict addressing
support.
(rs6000_legitimate_offset_address_p): Remove call to
virtual_stack_registers_memory_p.
(rs6000_legitimize_reload_address): Add quad address support.
(rs6000_legitimate_address_p): Move call to quad_address_p above
call to virtual_stack_registers_memory_p. Adjust quad_address_p args
to account for new strict usage.
(rs6000_output_move_128bit): Adjust quad_address_p args to account
for new strict usage.
* config/rs6000/predicates.md (quad_memory_operand): Likewise.
gcc/testsuite/
PR target/71656
* gcc.target/powerpc/pr71656-1.c: New test.
* gcc.target/powerpc/pr71656-2.c: New test.
From-SVN: r237811
Diffstat (limited to 'COPYING3')
0 files changed, 0 insertions, 0 deletions