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authorRichard Earnshaw <rearnsha@arm.com>2004-08-25 15:46:19 +0000
committerRichard Earnshaw <rearnsha@gcc.gnu.org>2004-08-25 15:46:19 +0000
commitda81b8d5ad3ec53213c18b233a6822e31670cb1e (patch)
tree2828bd839bd7b7f535ab67f94ae531bbbb0327c6
parent997db8f7fa580365cc922b178593aa557fb3657d (diff)
downloadgcc-da81b8d5ad3ec53213c18b233a6822e31670cb1e.tar.gz
re PR target/15948 (THUMB: ICE with non-commutative cbranch)
* PR target/15948 * arm.md (bicsi3_cbranch): Add alternative to handle tying operands one and two. From-SVN: r86553
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/arm/arm.md12
2 files changed, 13 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 83ca098969c..2dced02e995 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-08-25 Richard Earnshaw <rearnsha@arm.com>
+
+ * PR target/15948
+ * arm.md (bicsi3_cbranch): Add alternative to handle tying operands
+ one and two.
+
2004-08-24 Richard Henderson <rth@redhat.com>
PR target/16298
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 33cde2f33d0..8214b517509 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -5960,22 +5960,24 @@
[(set (pc)
(if_then_else
(match_operator 5 "equality_operator"
- [(and:SI (not:SI (match_operand:SI 3 "s_register_operand" "l,l,l,l"))
- (match_operand:SI 2 "s_register_operand" "0,1,1,1"))
+ [(and:SI (not:SI (match_operand:SI 3 "s_register_operand" "l,l,l,l,l"))
+ (match_operand:SI 2 "s_register_operand" "0,1,1,1,1"))
(const_int 0)])
(label_ref (match_operand 4 "" ""))
(pc)))
- (set (match_operand:SI 0 "thumb_cbrch_target_operand" "=l,*?h,*?m,*?m")
+ (set (match_operand:SI 0 "thumb_cbrch_target_operand" "=!l,l,*?h,*?m,*?m")
(and:SI (not:SI (match_dup 3)) (match_dup 2)))
- (clobber (match_scratch:SI 1 "=X,l,&l,&l"))]
+ (clobber (match_scratch:SI 1 "=X,l,l,&l,&l"))]
"TARGET_THUMB"
"*
{
if (which_alternative == 0)
output_asm_insn (\"bic\\t%0, %3\", operands);
- else if (which_alternative == 1)
+ else if (which_alternative <= 2)
{
output_asm_insn (\"bic\\t%1, %3\", operands);
+ /* It's ok if OP0 is a lo-reg, even though the mov will set the
+ conditions again, since we're only testing for equality. */
output_asm_insn (\"mov\\t%0, %1\", operands);
}
else