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authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2002-03-14 22:34:00 +0000
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2002-03-14 22:34:00 +0000
commita058e94a2cce7df6ebf91271a6eaf6133da33fb1 (patch)
treede3a5404e80b6989b2ac6522d0b98e23954f06da
parentf9c99beda0bfa0377a1664590a9534f0c3132068 (diff)
downloadgcc-a058e94a2cce7df6ebf91271a6eaf6133da33fb1.tar.gz
* arm.md: Fix warnings about constraints in peepholes and splits.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@50786 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/arm/arm.md16
2 files changed, 12 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 92370233021..78317db985c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2002-03-14 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm.md: Fix warnings about constraints in peepholes and splits.
+
2002-03-14 Zack Weinberg <zack@codesourcery.com>
* cpphash.h (struct lexer_state): Remove line_extension member.
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index d1259d472b7..52be5579bbc 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -596,10 +596,10 @@
;; Reloading and elimination of the frame pointer can
;; sometimes cause this optimization to be missed.
(define_peephole2
- [(set (match_operand:SI 0 "register_operand" "=l")
- (match_operand:SI 1 "const_int_operand" "M"))
+ [(set (match_operand:SI 0 "register_operand" "")
+ (match_operand:SI 1 "const_int_operand" ""))
(set (match_dup 0)
- (plus:SI (match_dup 0) (match_operand:SI 2 "register_operand" "k")))]
+ (plus:SI (match_dup 0) (match_operand:SI 2 "register_operand" "")))]
"TARGET_THUMB
&& REGNO (operands[2]) == STACK_POINTER_REGNUM
&& (unsigned HOST_WIDE_INT) (INTVAL (operands[1])) < 1024
@@ -2334,11 +2334,11 @@
; insns.
(define_split
- [(set (match_operand:SI 0 "s_register_operand" "=r")
- (ior:SI (and:SI (not:SI (match_operand:SI 1 "s_register_operand" "r"))
- (not:SI (match_operand:SI 2 "arm_rhs_operand" "rI")))
- (match_operand:SI 3 "arm_rhs_operand" "rI")))
- (clobber (match_operand:SI 4 "s_register_operand" "=r"))]
+ [(set (match_operand:SI 0 "s_register_operand" "")
+ (ior:SI (and:SI (not:SI (match_operand:SI 1 "s_register_operand" ""))
+ (not:SI (match_operand:SI 2 "arm_rhs_operand" "")))
+ (match_operand:SI 3 "arm_rhs_operand" "")))
+ (clobber (match_operand:SI 4 "s_register_operand" ""))]
"TARGET_ARM"
[(set (match_dup 4) (and:SI (ior:SI (match_dup 1) (match_dup 2))
(not:SI (match_dup 3))))