[arm] Use standard option parsing code for detecting

Now that the standard CPU and architecture option parsing code is
available in the driver we can use the main CPU and architecture data
tables for driving the automatic enabling of Thumb code.

Doing this requires that the driver script tell the parser whether or
not the target string is a CPU name or an architecture, but beyond
that it is just standard use of the new capabilities.

We do, however, now get some error checking if the target isn't
recognized, when previously we just ignored unknown targets and hoped
that a later pass would pick up on this.

	* config/arm/arm.h (TARGET_MODE_SPECS): Add additional parameter to
	call to target_mode_check describing the type of option passed.
	* common/config/arm/arm-common.c (arm_arch_core_flag): Delete.
	(arm_target_thumb_only): Use arm_parse_arch_option_name or
	arm_parse_cpu_option_name to match parameters against list of
	available targets.
	* config/arm/parsecpu.awk (gen_comm_data): Don't generate
	arm_arch_core_flags data structure.
	* config/arm/arm-cpu_cdata.h: Regenerated.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@249288 138bc75d-0d04-0410-961f-82ee72b054a4

5 files changed, 60 insertions, 1136 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 626b6d72eea..9325207244a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,17 @@
 2017-06-16  Richard Earnshaw  <rearnsha@arm.com>
 
+	* config/arm/arm.h (TARGET_MODE_SPECS): Add additional parameter to
+	call to target_mode_check describing the type of option passed.
+	* common/config/arm/arm-common.c (arm_arch_core_flag): Delete.
+	(arm_target_thumb_only): Use arm_parse_arch_option_name or
+	arm_parse_cpu_option_name to match parameters against list of
+	available targets.
+	* config/arm/parsecpu.awk (gen_comm_data): Don't generate
+	arm_arch_core_flags data structure.
+	* config/arm/arm-cpu_cdata.h: Regenerated.
+
+2017-06-16  Richard Earnshaw  <rearnsha@arm.com>
+
 	* common/config/arm/arm-common.c (arm_initialize_isa): Moved here from
 	config/arm/arm.c.
 	(arm_print_hint_for_cpu_option): Likewise.
diff --git a/gcc/common/config/arm/arm-common.c b/gcc/common/config/arm/arm-common.c
index f44ba1f92b2..42f1ad49da5 100644
--- a/gcc/common/config/arm/arm-common.c
+++ b/gcc/common/config/arm/arm-common.c
@@ -143,12 +143,6 @@ arm_rewrite_march (int argc, const char **argv)
   return arm_rewrite_selected_arch (argv[argc - 1]);
 }
 
-struct arm_arch_core_flag
-{
-  const char *const name;
-  const enum isa_feature isa_bits[isa_num_bits];
-};
-
 #include "config/arm/arm-cpu-cdata.h"
 
 /* Scan over a raw feature array BITS checking for BIT being present.
@@ -167,26 +161,60 @@ check_isa_bits_for (const enum isa_feature* bits, enum isa_feature bit)
 
 /* Called by the driver to check whether the target denoted by current
    command line options is a Thumb-only target.  ARGV is an array of
-   -march and -mcpu values (ie. it contains the rhs after the equal
-   sign) and we use the last one of them to make a decision.  The
-   number of elements in ARGV is given in ARGC.  */
+   tupples (normally only one) where the first element of the tupple
+   is 'cpu' or 'arch' and the second is the option passed to the
+   compiler for that.  An architecture tupple is always taken in
+   preference to a cpu tupple and the last of each type always
+   overrides any earlier setting.  */
+
 const char *
 arm_target_thumb_only (int argc, const char **argv)
 {
-  unsigned int opt;
+  const char *arch = NULL;
+  const char *cpu = NULL;
+
+  if (argc % 2 != 0)
+    fatal_error (input_location,
+		 "%%:target_mode_check takes an even number of parameters");
 
-  if (argc)
+  while (argc)
     {
-      for (opt = 0; opt < (ARRAY_SIZE (arm_arch_core_flags)); opt++)
-	if ((strcmp (argv[argc - 1], arm_arch_core_flags[opt].name) == 0)
-	    && !check_isa_bits_for (arm_arch_core_flags[opt].isa_bits,
-				    isa_bit_notm))
-	  return "-mthumb";
+      if (strcmp (argv[0], "arch") == 0)
+	arch = argv[1];
+      else if (strcmp (argv[0], "cpu") == 0)
+	cpu = argv[1];
+      else
+	fatal_error (input_location,
+		     "unrecognized option passed to %%:target_mode_check");
+      argc -= 2;
+      argv += 2;
+    }
 
-      return NULL;
+  /* No architecture, or CPU, has option extensions that change
+     whether or not we have a Thumb-only device, so there is no need
+     to scan any option extensions specified.  */
+
+  /* If the architecture is specified, that overrides any CPU setting.  */
+  if (arch)
+    {
+      const arch_option *arch_opt
+	= arm_parse_arch_option_name (all_architectures, "-march", arch);
+
+      if (arch_opt && !check_isa_bits_for (arch_opt->common.isa_bits,
+					   isa_bit_notm))
+	return "-mthumb";
     }
-  else
-    return NULL;
+  else if (cpu)
+    {
+      const cpu_option *cpu_opt
+	= arm_parse_cpu_option_name (all_cores, "-mcpu", cpu);
+
+      if (cpu_opt && !check_isa_bits_for (cpu_opt->common.isa_bits,
+					  isa_bit_notm))
+	return "-mthumb";
+    }
+
+  return NULL;
 }
 
 /* List the permitted CPU option names.  If TARGET is a near miss for an
diff --git a/gcc/config/arm/arm-cpu-cdata.h b/gcc/config/arm/arm-cpu-cdata.h
index 5329bd631ff..6c674dacef1 100644
--- a/gcc/config/arm/arm-cpu-cdata.h
+++ b/gcc/config/arm/arm-cpu-cdata.h
@@ -348,22 +348,6 @@ static const cpu_arch_extension cpu_opttab_exynosm1[] = {
   { NULL, false, {isa_nobit}}
 };
 
-static const cpu_arch_extension cpu_opttab_falkor[] = {
-  {
-    "crypto", false,
-    { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
-  },
-  { NULL, false, {isa_nobit}}
-};
-
-static const cpu_arch_extension cpu_opttab_qdf24xx[] = {
-  {
-    "crypto", false,
-    { ISA_FP_ARMv8,ISA_CRYPTO, isa_nobit }
-  },
-  { NULL, false, {isa_nobit}}
-};
-
 static const cpu_arch_extension cpu_opttab_xgene1[] = {
   {
     "crypto", false,
@@ -1576,32 +1560,6 @@ const cpu_option all_cores[] =
   },
   {
     {
-      "falkor",
-      cpu_opttab_falkor,
-      {
-        ISA_ARMv8a,
-        isa_bit_crc32,
-        ISA_FP_ARMv8,ISA_NEON,
-        isa_nobit
-      }
-    },
-    TARGET_ARCH_armv8_a
-  },
-  {
-    {
-      "qdf24xx",
-      cpu_opttab_qdf24xx,
-      {
-        ISA_ARMv8a,
-        isa_bit_crc32,
-        ISA_FP_ARMv8,ISA_NEON,
-        isa_nobit
-      }
-    },
-    TARGET_ARCH_armv8_a
-  },
-  {
-    {
       "xgene1",
       cpu_opttab_xgene1,
       {
@@ -2600,1039 +2558,3 @@ const arm_fpu_desc all_fpus[] =
     }
   },
 };
-static const struct arm_arch_core_flag arm_arch_core_flags[] =
-{
-  {
-    "arm2",
-    {
-      ISA_ARMv2,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm250",
-    {
-      ISA_ARMv2,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm3",
-    {
-      ISA_ARMv2,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm6",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm60",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm600",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm610",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm620",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7d",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7di",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm70",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm700",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm700i",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm710",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm720",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm710c",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7100",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7500",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7500fe",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7m",
-    {
-      ISA_ARMv3m,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7dm",
-    {
-      ISA_ARMv3m,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7dmi",
-    {
-      ISA_ARMv3m,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm8",
-    {
-      ISA_ARMv4,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm810",
-    {
-      ISA_ARMv4,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "strongarm",
-    {
-      ISA_ARMv4,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "strongarm110",
-    {
-      ISA_ARMv4,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "strongarm1100",
-    {
-      ISA_ARMv4,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "strongarm1110",
-    {
-      ISA_ARMv4,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "fa526",
-    {
-      ISA_ARMv4,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "fa626",
-    {
-      ISA_ARMv4,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "arm7tdmi",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm7tdmi-s",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm710t",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm720t",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm740t",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm9",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm9tdmi",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm920",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm920t",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm922t",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm940t",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "ep9312",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "arm10tdmi",
-    {
-      ISA_ARMv5t,
-      isa_nobit
-    },
-  },
-  {
-    "arm1020t",
-    {
-      ISA_ARMv5t,
-      isa_nobit
-    },
-  },
-  {
-    "arm9e",
-    {
-      ISA_ARMv5te,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm946e-s",
-    {
-      ISA_ARMv5te,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm966e-s",
-    {
-      ISA_ARMv5te,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm968e-s",
-    {
-      ISA_ARMv5te,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm10e",
-    {
-      ISA_ARMv5te,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm1020e",
-    {
-      ISA_ARMv5te,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm1022e",
-    {
-      ISA_ARMv5te,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "xscale",
-    {
-      ISA_ARMv5te,
-      isa_bit_xscale,
-      isa_nobit
-    },
-  },
-  {
-    "iwmmxt",
-    {
-      ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt,
-      isa_nobit
-    },
-  },
-  {
-    "iwmmxt2",
-    {
-      ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt,isa_bit_iwmmxt2,
-      isa_nobit
-    },
-  },
-  {
-    "fa606te",
-    {
-      ISA_ARMv5te,
-      isa_nobit
-    },
-  },
-  {
-    "fa626te",
-    {
-      ISA_ARMv5te,
-      isa_nobit
-    },
-  },
-  {
-    "fmp626",
-    {
-      ISA_ARMv5te,
-      isa_nobit
-    },
-  },
-  {
-    "fa726te",
-    {
-      ISA_ARMv5te,
-      isa_nobit
-    },
-  },
-  {
-    "arm926ej-s",
-    {
-      ISA_ARMv5tej,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm1026ej-s",
-    {
-      ISA_ARMv5tej,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm1136j-s",
-    {
-      ISA_ARMv6j,
-      isa_nobit
-    },
-  },
-  {
-    "arm1136jf-s",
-    {
-      ISA_ARMv6j,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm1176jz-s",
-    {
-      ISA_ARMv6kz,
-      isa_nobit
-    },
-  },
-  {
-    "arm1176jzf-s",
-    {
-      ISA_ARMv6kz,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "mpcorenovfp",
-    {
-      ISA_ARMv6k,
-      isa_nobit
-    },
-  },
-  {
-    "mpcore",
-    {
-      ISA_ARMv6k,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "arm1156t2-s",
-    {
-      ISA_ARMv6t2,
-      isa_nobit
-    },
-  },
-  {
-    "arm1156t2f-s",
-    {
-      ISA_ARMv6t2,
-      ISA_VFPv2,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m1",
-    {
-      ISA_ARMv6m,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m0",
-    {
-      ISA_ARMv6m,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m0plus",
-    {
-      ISA_ARMv6m,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m1.small-multiply",
-    {
-      ISA_ARMv6m,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m0.small-multiply",
-    {
-      ISA_ARMv6m,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m0plus.small-multiply",
-    {
-      ISA_ARMv6m,
-      isa_nobit
-    },
-  },
-  {
-    "generic-armv7-a",
-    {
-      ISA_ARMv7a,
-      ISA_VFPv3,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a5",
-    {
-      ISA_ARMv7a,
-      ISA_VFPv3,ISA_NEON,isa_bit_fp16conv,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a7",
-    {
-      ISA_ARMv7ve,
-      ISA_VFPv4,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a8",
-    {
-      ISA_ARMv7a,
-      ISA_VFPv3,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a9",
-    {
-      ISA_ARMv7a,
-      ISA_VFPv3,ISA_NEON,isa_bit_fp16conv,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a12",
-    {
-      ISA_ARMv7ve,
-      ISA_VFPv4,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a15",
-    {
-      ISA_ARMv7ve,
-      ISA_VFPv4,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a17",
-    {
-      ISA_ARMv7ve,
-      ISA_VFPv4,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-r4",
-    {
-      ISA_ARMv7r,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-r4f",
-    {
-      ISA_ARMv7r,
-      ISA_VFPv3,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-r5",
-    {
-      ISA_ARMv7r,
-      ISA_VFPv3,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-r7",
-    {
-      ISA_ARMv7r,
-      ISA_VFPv3,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-r8",
-    {
-      ISA_ARMv7r,
-      ISA_VFPv3,ISA_FP_DBL,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m7",
-    {
-      ISA_ARMv7em,
-      ISA_FPv5,ISA_FP_DBL,
-      isa_quirk_no_volatile_ce,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m4",
-    {
-      ISA_ARMv7em,
-      ISA_VFPv4,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m3",
-    {
-      ISA_ARMv7m,
-      isa_quirk_cm3_ldrd,
-      isa_nobit
-    },
-  },
-  {
-    "marvell-pj4",
-    {
-      ISA_ARMv7a,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a15.cortex-a7",
-    {
-      ISA_ARMv7ve,
-      ISA_VFPv4,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a17.cortex-a7",
-    {
-      ISA_ARMv7ve,
-      ISA_VFPv4,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a32",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a35",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a53",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a57",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a72",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a73",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "exynos-m1",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "xgene1",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a57.cortex-a53",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a72.cortex-a53",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a73.cortex-a35",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-a73.cortex-a53",
-    {
-      ISA_ARMv8a,
-      ISA_FP_ARMv8,ISA_NEON,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m23",
-    {
-      ISA_ARMv8m_base,
-      isa_nobit
-    },
-  },
-  {
-    "cortex-m33",
-    {
-      ISA_ARMv8m_main,
-      ISA_FPv5,
-      isa_nobit
-    },
-  },
-  {
-    "armv2",
-    {
-      ISA_ARMv2,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "armv2a",
-    {
-      ISA_ARMv2,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "armv3",
-    {
-      ISA_ARMv3,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "armv3m",
-    {
-      ISA_ARMv3m,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "armv4",
-    {
-      ISA_ARMv4,isa_bit_mode26,
-      isa_nobit
-    },
-  },
-  {
-    "armv4t",
-    {
-      ISA_ARMv4t,
-      isa_nobit
-    },
-  },
-  {
-    "armv5",
-    {
-      ISA_ARMv5,
-      isa_nobit
-    },
-  },
-  {
-    "armv5t",
-    {
-      ISA_ARMv5t,
-      isa_nobit
-    },
-  },
-  {
-    "armv5e",
-    {
-      ISA_ARMv5e,
-      isa_nobit
-    },
-  },
-  {
-    "armv5te",
-    {
-      ISA_ARMv5te,
-      isa_nobit
-    },
-  },
-  {
-    "armv5tej",
-    {
-      ISA_ARMv5tej,
-      isa_nobit
-    },
-  },
-  {
-    "armv6",
-    {
-      ISA_ARMv6,
-      isa_nobit
-    },
-  },
-  {
-    "armv6j",
-    {
-      ISA_ARMv6j,
-      isa_nobit
-    },
-  },
-  {
-    "armv6k",
-    {
-      ISA_ARMv6k,
-      isa_nobit
-    },
-  },
-  {
-    "armv6z",
-    {
-      ISA_ARMv6z,
-      isa_nobit
-    },
-  },
-  {
-    "armv6kz",
-    {
-      ISA_ARMv6kz,
-      isa_nobit
-    },
-  },
-  {
-    "armv6zk",
-    {
-      ISA_ARMv6kz,
-      isa_nobit
-    },
-  },
-  {
-    "armv6t2",
-    {
-      ISA_ARMv6t2,
-      isa_nobit
-    },
-  },
-  {
-    "armv6-m",
-    {
-      ISA_ARMv6m,
-      isa_nobit
-    },
-  },
-  {
-    "armv6s-m",
-    {
-      ISA_ARMv6m,
-      isa_nobit
-    },
-  },
-  {
-    "armv7",
-    {
-      ISA_ARMv7,
-      isa_nobit
-    },
-  },
-  {
-    "armv7-a",
-    {
-      ISA_ARMv7a,
-      isa_nobit
-    },
-  },
-  {
-    "armv7ve",
-    {
-      ISA_ARMv7ve,
-      isa_nobit
-    },
-  },
-  {
-    "armv7-r",
-    {
-      ISA_ARMv7r,
-      isa_nobit
-    },
-  },
-  {
-    "armv7-m",
-    {
-      ISA_ARMv7m,
-      isa_nobit
-    },
-  },
-  {
-    "armv7e-m",
-    {
-      ISA_ARMv7em,
-      isa_nobit
-    },
-  },
-  {
-    "armv8-a",
-    {
-      ISA_ARMv8a,
-      isa_nobit
-    },
-  },
-  {
-    "armv8.1-a",
-    {
-      ISA_ARMv8_1a,
-      isa_nobit
-    },
-  },
-  {
-    "armv8.2-a",
-    {
-      ISA_ARMv8_2a,
-      isa_nobit
-    },
-  },
-  {
-    "armv8-m.base",
-    {
-      ISA_ARMv8m_base,
-      isa_nobit
-    },
-  },
-  {
-    "armv8-m.main",
-    {
-      ISA_ARMv8m_main,
-      isa_nobit
-    },
-  },
-  {
-    "iwmmxt",
-    {
-      ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt,
-      isa_nobit
-    },
-  },
-  {
-    "iwmmxt2",
-    {
-      ISA_ARMv5te,isa_bit_xscale,isa_bit_iwmmxt,isa_bit_iwmmxt2,
-      isa_nobit
-    },
-  },
-};
-
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index d398b99fbb2..590755e3fa0 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -2262,7 +2262,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
    - an array of -mcpu values if any is given;
    - an empty array.  */
 #define TARGET_MODE_SPECS						\
-  " %{!marm:%{!mthumb:%:target_mode_check(%{march=*:%*;mcpu=*:%*;:})}}"
+  " %{!marm:%{!mthumb:%:target_mode_check(%{march=*:arch %*;mcpu=*:cpu %*;:})}}"
 
 #define DRIVER_SELF_SPECS MCPU_MTUNE_NATIVE_SPECS TARGET_MODE_SPECS
 #define TARGET_SUPPORTS_WIDE_INT 1
diff --git a/gcc/config/arm/parsecpu.awk b/gcc/config/arm/parsecpu.awk
index 70b89381454..3d6ca4d36ba 100644
--- a/gcc/config/arm/parsecpu.awk
+++ b/gcc/config/arm/parsecpu.awk
@@ -288,44 +288,6 @@ function gen_comm_data () {
     }
 
     print "};"
-
-    print "static const struct arm_arch_core_flag arm_arch_core_flags[] ="
-    print "{"
-
-    ncpus = split (cpu_list, cpus)
-
-    for (n = 1; n <= ncpus; n++) {
-	print "  {"
-	print "    \"" cpus[n] "\","
-	# Just truncate the architecture name at the beginning of the
-	# extensions.  We don't need any of those here (at present).
-	arch_name = cpu_arch[cpus[n]];
-	sub("+.*", "", arch_name)
-	if (! (arch_name in arch_isa)) {
-	    fatal("unknown arch " arch_name " for cpu " cpus[n])
-	}
-	print "    {"
-	print "      " arch_isa[arch_name] ","
-	if (cpus[n] in cpu_fpu)	print "      " fpu_isa[cpu_fpu[cpus[n]]] ","
-	if (cpus[n] in cpu_isa)	print "      " cpu_isa[cpus[n]] ","
-	print "      isa_nobit"
-	print "    },"
-	print "  },"
-    }
-
-    narchs = split (arch_list, archs)
-
-    for (n = 1; n <= narchs; n++) {
-	print "  {"
-	print "    \"" archs[n] "\","
-	print "    {"
-	print "      " arch_isa[archs[n]] ","
-	print "      isa_nobit"
-	print "    },"
-	print "  },"
-    }
-
-    print "};\n"
 }
 
 function gen_md () {