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author | Yvan Roux <yvan.roux@linaro.org> | 2017-08-10 15:13:25 +0200 |
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committer | Yvan Roux <yvan.roux@linaro.org> | 2017-08-16 07:48:33 +0000 |
commit | 5531e8a141999adda1c589f147521513f57b6ad5 (patch) | |
tree | 1ebc16027b7948b3c12f65bda1bb665b1e3fa932 | |
parent | 05d573d558389a8977cc1534132024710ed24170 (diff) | |
download | gcc-5531e8a141999adda1c589f147521513f57b6ad5.tar.gz |
gcc/
Backport from trunk r249064.
2017-06-09 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64.md (lrint<GPF:mode><GPI:mode>2): New.
gcc/testsuite/
Backport from trunk r249064.
2017-06-09 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/lrint-matherr.h: New.
* gcc.target/aarch64/inline-lrint_1.c: New.
* gcc.target/aarch64/inline-lrint_2.c: New.
* gcc.target/aarch64/no-inline-lrint_1.c: New.
* gcc.target/aarch64/no-inline-lrint_2.c: New.
gcc/testsuite/
Backport from trunk r249127.
2017-06-12 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/inline-lrint_1.c: Broaden regexp.
* gcc.target/aarch64/inline-lrint_2.c: Likewise.
* gcc.target/aarch64/no-inline-lrint_1.c: Likewise.
* gcc.target/aarch64/no-inline-lrint_2.c: Likewise.
Change-Id: I5c26605abbf9a0e2e9c7e5d6969f289db7b03c52
-rw-r--r-- | gcc/config/aarch64/aarch64.md | 12 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c | 18 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c | 18 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/lrint-matherr.h | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c | 19 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c | 19 |
6 files changed, 91 insertions, 0 deletions
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 2e9331fd72b..1a721bfbe42 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -4940,6 +4940,18 @@ [(set_attr "type" "f_minmax<stype>")] ) +(define_expand "lrint<GPF:mode><GPI:mode>2" + [(match_operand:GPI 0 "register_operand") + (match_operand:GPF 1 "register_operand")] + "TARGET_FLOAT" +{ + rtx cvt = gen_reg_rtx (<GPF:MODE>mode); + emit_insn (gen_rint<GPF:mode>2 (cvt, operands[1])); + emit_insn (gen_lbtrunc<GPF:mode><GPI:mode>2 (operands[0], cvt)); + DONE; +} +) + ;; For copysign (x, y), we want to generate: ;; ;; LDR d2, #(1 << 63) diff --git a/gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c b/gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c new file mode 100644 index 00000000000..478875ff874 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/inline-lrint_1.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O3 -fno-math-errno" } */ + +#include "lrint-matherr.h" + +TEST (dld, double, long, ) +TEST (flf, float , long, ) + +TEST (did, double, int, ) +TEST (fif, float , int, ) + +TEST (dlld, double, long long, l) +TEST (fllf, float , long long, l) + +/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */ +/* { dg-final { scan-assembler-times "fcvtzs\tx\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */ +/* { dg-final { scan-assembler-not "bl" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c b/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c new file mode 100644 index 00000000000..6080e186d8f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/inline-lrint_2.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-options "-O3 -fno-math-errno" } */ + +#include "lrint-matherr.h" + +TEST (dld, double, long, ) +TEST (flf, float , long, ) + +TEST (did, double, int, ) +TEST (fif, float , int, ) + +TEST (dlld, double, long long, l) +TEST (fllf, float , long long, l) + +/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */ +/* { dg-final { scan-assembler-times "fcvtzs\t\[w,x\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */ +/* { dg-final { scan-assembler-not "bl" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/lrint-matherr.h b/gcc/testsuite/gcc.target/aarch64/lrint-matherr.h new file mode 100644 index 00000000000..cc6e3d13f9b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/lrint-matherr.h @@ -0,0 +1,5 @@ +#define TEST(name, float_type, int_type, pref) void f_##name (float_type x) \ +{ \ + volatile float_type a = __builtin_rint (x); \ + volatile int_type b = __builtin_l##pref##rint (x); \ +} diff --git a/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c new file mode 100644 index 00000000000..d5e9200562c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target lp64 } */ +/* { dg-options "-O3" } */ + +#include "lrint-matherr.h" + +TEST (dld, double, long, ) +TEST (flf, float , long, ) + +TEST (did, double, int, ) +TEST (fif, float , int, ) + +TEST (dlld, double, long long, l) +TEST (fllf, float , long long, l) + +/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */ +/* { dg-final { scan-assembler-times "bl\tlrint" 4 } } */ +/* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */ +/* { dg-final { scan-assembler-not "fcvtzs" } } */ diff --git a/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c new file mode 100644 index 00000000000..05c0a2affa0 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/no-inline-lrint_2.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target ilp32 } */ +/* { dg-options "-O3" } */ + +#include "lrint-matherr.h" + +TEST (dld, double, long, ) +TEST (flf, float , long, ) + +TEST (did, double, int, ) +TEST (fif, float , int, ) + +TEST (dlld, double, long long, l) +TEST (fllf, float , long long, l) + +/* { dg-final { scan-assembler-times "frintx\t\[d,s\]\[0-9\]+, \[d,s\]\[0-9\]+" 6 } } */ +/* { dg-final { scan-assembler-times "bl\tlrint" 4 } } */ +/* { dg-final { scan-assembler-times "bl\tllrint" 2 } } */ +/* { dg-final { scan-assembler-not "fcvtzs" } } */ |