diff options
| author | vmakarov <vmakarov@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-09-29 17:39:58 +0000 |
|---|---|---|
| committer | vmakarov <vmakarov@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-09-29 17:39:58 +0000 |
| commit | d5952b7ce44d11ff09399845fbbf27996733dfba (patch) | |
| tree | 7491ed745470e89604e0f2b86f3eb5a343382bc6 | |
| parent | 2fa8212be77227b06e1b1b9ef8b0c060a1318483 (diff) | |
| download | gcc-d5952b7ce44d11ff09399845fbbf27996733dfba.tar.gz | |
2017-09-29 Vladimir Makarov <vmakarov@redhat.com>
PR target/81481
* ira-costs.c (scan_one_insn): Don't take into account PIC equiv
with a symbol for LRA.
2017-09-29 Vladimir Makarov <vmakarov@redhat.com>
PR target/81481
* gcc.target/i386/pr81481.c: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@253300 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/ira-costs.c | 5 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr81481.c | 18 |
4 files changed, 33 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a2eea908053..bdf728b6fff 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2017-09-29 Vladimir Makarov <vmakarov@redhat.com> + PR target/81481 + * ira-costs.c (scan_one_insn): Don't take into account PIC equiv + with a symbol for LRA. + +2017-09-29 Vladimir Makarov <vmakarov@redhat.com> + PR rtl-optimization/82338 * lra-constraints.c (inherit_in_ebb): Check usage_insns check. diff --git a/gcc/ira-costs.c b/gcc/ira-costs.c index 714bdbd8c70..0bd07788833 100644 --- a/gcc/ira-costs.c +++ b/gcc/ira-costs.c @@ -1471,7 +1471,10 @@ scan_one_insn (rtx_insn *insn) && targetm.legitimate_constant_p (GET_MODE (SET_DEST (set)), XEXP (note, 0)) && REG_N_SETS (REGNO (SET_DEST (set))) == 1)) - && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set)))) + && general_operand (SET_SRC (set), GET_MODE (SET_SRC (set))) + /* LRA does not use equiv with a symbol for PIC code. */ + && (! ira_use_lra_p || ! pic_offset_table_rtx + || ! contains_symbol_ref_p (XEXP (note, 0)))) { enum reg_class cl = GENERAL_REGS; rtx reg = SET_DEST (set); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 537b751f636..ac88fd3edf7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-09-29 Vladimir Makarov <vmakarov@redhat.com> + + PR target/81481 + * gcc.target/i386/pr81481.c: New. + 2017-09-29 Kelvin Nilsen <kelvin@gcc.gnu.org> * gcc.target/powerpc/swaps-p8-30.c: Exchange the order of dg-do diff --git a/gcc/testsuite/gcc.target/i386/pr81481.c b/gcc/testsuite/gcc.target/i386/pr81481.c new file mode 100644 index 00000000000..a5b936fdacc --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr81481.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target ssse3 } */ +/* { dg-options "-O2 -fpic -mssse3" } */ +/* { dg-final { scan-assembler-not "pshufb\[ \t\]\\(%esp\\)" } } */ +#include <immintrin.h> + +extern const signed char c[31] __attribute__((visibility("hidden"))); + +__m128i f(__m128i *x, void *v) +{ + int i; + asm("# %0" : "=r"(i)); + __m128i t = _mm_loadu_si128((void*)&c[i]); + __m128i xx = *x; + xx = _mm_shuffle_epi8(xx, t); + asm("# %0 %1 %2" : "+x"(xx) : "r"(c), "r"(i)); + return xx; +} |