PR target/18932

        * config/i386/i386.md (all splits and peepholes): Use flags_reg_operand
        and compare_operator to propagate the input CC mode to the output.
        * config/i386/predicates.md (compare_operator): New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@92058 138bc75d-0d04-0410-961f-82ee72b054a4

3 files changed, 221 insertions, 246 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cc34def93a3..f1b1c55c5fb 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2004-12-12  Richard Henderson  <rth@redhat.com>
+
+	PR target/18932
+	* config/i386/i386.md (all splits and peepholes): Use flags_reg_operand
+	and compare_operator to propagate the input CC mode to the output.
+	* config/i386/predicates.md (compare_operator): New.
+
 2004-12-12  Andrew Pinski  <pinskia@physics.uc.edu>
 
 	PR tree-opt/18040
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b73aaa3e8d8..135017f643b 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7992,51 +7992,53 @@
   "#")
 
 (define_split
-  [(set (reg FLAGS_REG)
-        (compare (zero_extract
-		   (match_operand 0 "nonimmediate_operand" "")
-		   (match_operand 1 "const_int_operand" "")
-		   (match_operand 2 "const_int_operand" ""))
-		 (const_int 0)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+        (match_operator 1 "compare_operator"
+	  [(zero_extract
+	     (match_operand 2 "nonimmediate_operand" "")
+	     (match_operand 3 "const_int_operand" "")
+	     (match_operand 4 "const_int_operand" ""))
+	   (const_int 0)]))]
   "ix86_match_ccmode (insn, CCNOmode)"
-  [(set (reg:CCNO FLAGS_REG) (compare:CCNO (match_dup 3) (const_int 0)))]
+  [(set (match_dup 0) (match_op_dup 1 [(match_dup 2) (const_int 0)]))]
 {
-  HOST_WIDE_INT len = INTVAL (operands[1]);
-  HOST_WIDE_INT pos = INTVAL (operands[2]);
+  rtx val = operands[2];
+  HOST_WIDE_INT len = INTVAL (operands[3]);
+  HOST_WIDE_INT pos = INTVAL (operands[4]);
   HOST_WIDE_INT mask;
   enum machine_mode mode, submode;
 
-  mode = GET_MODE (operands[0]);
-  if (GET_CODE (operands[0]) == MEM)
+  mode = GET_MODE (val);
+  if (GET_CODE (val) == MEM)
     {
       /* ??? Combine likes to put non-volatile mem extractions in QImode
 	 no matter the size of the test.  So find a mode that works.  */
-      if (! MEM_VOLATILE_P (operands[0]))
+      if (! MEM_VOLATILE_P (val))
 	{
 	  mode = smallest_mode_for_size (pos + len, MODE_INT);
-	  operands[0] = adjust_address (operands[0], mode, 0);
+	  val = adjust_address (val, mode, 0);
 	}
     }
-  else if (GET_CODE (operands[0]) == SUBREG
-	   && (submode = GET_MODE (SUBREG_REG (operands[0])),
+  else if (GET_CODE (val) == SUBREG
+	   && (submode = GET_MODE (SUBREG_REG (val)),
 	       GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (submode))
 	   && pos + len <= GET_MODE_BITSIZE (submode))
     {
       /* Narrow a paradoxical subreg to prevent partial register stalls.  */
       mode = submode;
-      operands[0] = SUBREG_REG (operands[0]);
+      val = SUBREG_REG (val);
     }
   else if (mode == HImode && pos + len <= 8)
     {
       /* Small HImode tests can be converted to QImode.  */
       mode = QImode;
-      operands[0] = gen_lowpart (QImode, operands[0]);
+      val = gen_lowpart (QImode, val);
     }
 
   mask  = ((HOST_WIDE_INT)1 << (pos + len)) - 1;
   mask &= ~(((HOST_WIDE_INT)1 << pos) - 1);
 
-  operands[3] = gen_rtx_AND (mode, operands[0], gen_int_mode (mask, mode));
+  operands[2] = gen_rtx_AND (mode, val, gen_int_mode (mask, mode));
 })
 
 ;; Convert HImode/SImode test instructions with immediate to QImode ones.
@@ -8045,46 +8047,44 @@
 ;; Do the conversion only post-reload to avoid limiting of the register class
 ;; to QI regs.
 (define_split
-  [(set (reg FLAGS_REG)
-	(compare
-	  (and (match_operand 0 "register_operand" "")
-	       (match_operand 1 "const_int_operand" ""))
-	  (const_int 0)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 1 "compare_operator"
+	  [(and (match_operand 2 "register_operand" "")
+	        (match_operand 3 "const_int_operand" ""))
+	   (const_int 0)]))]
    "reload_completed
-    && QI_REG_P (operands[0])
+    && QI_REG_P (operands[2])
+    && GET_MODE (operands[2]) != QImode
     && ((ix86_match_ccmode (insn, CCZmode)
-    	 && !(INTVAL (operands[1]) & ~(255 << 8)))
+    	 && !(INTVAL (operands[3]) & ~(255 << 8)))
 	|| (ix86_match_ccmode (insn, CCNOmode)
-	    && !(INTVAL (operands[1]) & ~(127 << 8))))
-    && GET_MODE (operands[0]) != QImode"
-  [(set (reg:CCNO FLAGS_REG)
-	(compare:CCNO
-	  (and:SI (zero_extract:SI (match_dup 0) (const_int 8) (const_int 8))
-		  (match_dup 1))
-	  (const_int 0)))]
-  "operands[0] = gen_lowpart (SImode, operands[0]);
-   operands[1] = gen_int_mode (INTVAL (operands[1]) >> 8, SImode);")
+	    && !(INTVAL (operands[3]) & ~(127 << 8))))"
+  [(set (match_dup 0)
+	(match_op_dup 1
+	  [(and:SI (zero_extract:SI (match_dup 2) (const_int 8) (const_int 8))
+		   (match_dup 3))
+	   (const_int 0)]))]
+  "operands[2] = gen_lowpart (SImode, operands[2]);
+   operands[3] = gen_int_mode (INTVAL (operands[3]) >> 8, SImode);")
 
 (define_split
-  [(set (reg FLAGS_REG)
-	(compare
-	  (and (match_operand 0 "nonimmediate_operand" "")
-	       (match_operand 1 "const_int_operand" ""))
-	  (const_int 0)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 1 "compare_operator"
+	  [(and (match_operand 2 "nonimmediate_operand" "")
+	        (match_operand 3 "const_int_operand" ""))
+	   (const_int 0)]))]
    "reload_completed
-    && (!REG_P (operands[0]) || ANY_QI_REG_P (operands[0]))
+    && GET_MODE (operands[2]) != QImode
+    && (!REG_P (operands[2]) || ANY_QI_REG_P (operands[2]))
     && ((ix86_match_ccmode (insn, CCZmode)
-	 && !(INTVAL (operands[1]) & ~255))
+	 && !(INTVAL (operands[3]) & ~255))
 	|| (ix86_match_ccmode (insn, CCNOmode)
-	    && !(INTVAL (operands[1]) & ~127)))
-    && GET_MODE (operands[0]) != QImode"
-  [(set (reg:CCNO FLAGS_REG)
-	(compare:CCNO
-	  (and:QI (match_dup 0)
-		  (match_dup 1))
-	  (const_int 0)))]
-  "operands[0] = gen_lowpart (QImode, operands[0]);
-   operands[1] = gen_lowpart (QImode, operands[1]);")
+	    && !(INTVAL (operands[3]) & ~127)))"
+  [(set (match_dup 0)
+	(match_op_dup 1 [(and:QI (match_dup 2) (match_dup 3))
+			 (const_int 0)]))]
+  "operands[2] = gen_lowpart (QImode, operands[2]);
+   operands[3] = gen_lowpart (QImode, operands[3]);")
 
 
 ;; %%% This used to optimize known byte-wide and operations to memory,
@@ -10370,17 +10370,19 @@
    (set_attr "mode" "DI")])
 
 (define_split
-  [(set (reg FLAGS_REG)
-	(compare (not:DI (match_operand:DI 1 "nonimmediate_operand" ""))
-		 (const_int 0)))
-   (set (match_operand:DI 0 "nonimmediate_operand" "")
-	(not:DI (match_dup 1)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 2 "compare_operator"
+	  [(not:DI (match_operand:DI 3 "nonimmediate_operand" ""))
+	   (const_int 0)]))
+   (set (match_operand:DI 1 "nonimmediate_operand" "")
+	(not:DI (match_dup 3)))]
   "TARGET_64BIT && ix86_match_ccmode (insn, CCNOmode)"
-  [(parallel [(set (reg:CCNO FLAGS_REG)
-		   (compare:CCNO (xor:DI (match_dup 1) (const_int -1))
-				 (const_int 0)))
-	      (set (match_dup 0)
-		   (xor:DI (match_dup 1) (const_int -1)))])]
+  [(parallel [(set (match_dup 0)
+		   (match_op_dup 2
+		     [(xor:DI (match_dup 3) (const_int -1))
+		      (const_int 0)]))
+	      (set (match_dup 1)
+		   (xor:DI (match_dup 3) (const_int -1)))])]
   "")
 
 (define_expand "one_cmplsi2"
@@ -10419,17 +10421,18 @@
    (set_attr "mode" "SI")])
 
 (define_split
-  [(set (reg FLAGS_REG)
-	(compare (not:SI (match_operand:SI 1 "nonimmediate_operand" ""))
-		 (const_int 0)))
-   (set (match_operand:SI 0 "nonimmediate_operand" "")
-	(not:SI (match_dup 1)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 2 "compare_operator"
+	  [(not:SI (match_operand:SI 3 "nonimmediate_operand" ""))
+	   (const_int 0)]))
+   (set (match_operand:SI 1 "nonimmediate_operand" "")
+	(not:SI (match_dup 3)))]
   "ix86_match_ccmode (insn, CCNOmode)"
-  [(parallel [(set (reg:CCNO FLAGS_REG)
-		   (compare:CCNO (xor:SI (match_dup 1) (const_int -1))
-				 (const_int 0)))
-	      (set (match_dup 0)
-		   (xor:SI (match_dup 1) (const_int -1)))])]
+  [(parallel [(set (match_dup 0)
+		   (match_op_dup 2 [(xor:SI (match_dup 3) (const_int -1))
+				    (const_int 0)]))
+	      (set (match_dup 1)
+		   (xor:SI (match_dup 3) (const_int -1)))])]
   "")
 
 ;; ??? Currently never generated - xor is used instead.
@@ -10446,17 +10449,18 @@
    (set_attr "mode" "SI")])
 
 (define_split
-  [(set (reg FLAGS_REG)
-	(compare (not:SI (match_operand:SI 1 "register_operand" ""))
-		 (const_int 0)))
-   (set (match_operand:DI 0 "register_operand" "")
-	(zero_extend:DI (not:SI (match_dup 1))))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 2 "compare_operator"
+	  [(not:SI (match_operand:SI 3 "register_operand" ""))
+	   (const_int 0)]))
+   (set (match_operand:DI 1 "register_operand" "")
+	(zero_extend:DI (not:SI (match_dup 3))))]
   "ix86_match_ccmode (insn, CCNOmode)"
-  [(parallel [(set (reg:CCNO FLAGS_REG)
-		   (compare:CCNO (xor:SI (match_dup 1) (const_int -1))
-				 (const_int 0)))
-	      (set (match_dup 0)
-		   (zero_extend:DI (xor:SI (match_dup 1) (const_int -1))))])]
+  [(parallel [(set (match_dup 0)
+		   (match_op_dup 2 [(xor:SI (match_dup 3) (const_int -1))
+				    (const_int 0)]))
+	      (set (match_dup 1)
+		   (zero_extend:DI (xor:SI (match_dup 3) (const_int -1))))])]
   "")
 
 (define_expand "one_cmplhi2"
@@ -10486,17 +10490,18 @@
    (set_attr "mode" "HI")])
 
 (define_split
-  [(set (reg FLAGS_REG)
-	(compare (not:HI (match_operand:HI 1 "nonimmediate_operand" ""))
-		 (const_int 0)))
-   (set (match_operand:HI 0 "nonimmediate_operand" "")
-	(not:HI (match_dup 1)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 2 "compare_operator"
+	  [(not:HI (match_operand:HI 3 "nonimmediate_operand" ""))
+	   (const_int 0)]))
+   (set (match_operand:HI 1 "nonimmediate_operand" "")
+	(not:HI (match_dup 3)))]
   "ix86_match_ccmode (insn, CCNOmode)"
-  [(parallel [(set (reg:CCNO FLAGS_REG)
-		   (compare:CCNO (xor:HI (match_dup 1) (const_int -1))
-		      		 (const_int 0)))
-	      (set (match_dup 0)
-		   (xor:HI (match_dup 1) (const_int -1)))])]
+  [(parallel [(set (match_dup 0)
+		   (match_op_dup 2 [(xor:HI (match_dup 3) (const_int -1))
+		      		    (const_int 0)]))
+	      (set (match_dup 1)
+		   (xor:HI (match_dup 3) (const_int -1)))])]
   "")
 
 ;; %%% Potential partial reg stall on alternative 1.  What to do?
@@ -10529,17 +10534,18 @@
    (set_attr "mode" "QI")])
 
 (define_split
-  [(set (reg FLAGS_REG)
-	(compare (not:QI (match_operand:QI 1 "nonimmediate_operand" ""))
-		 (const_int 0)))
-   (set (match_operand:QI 0 "nonimmediate_operand" "")
-	(not:QI (match_dup 1)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 2 "compare_operator"
+	  [(not:QI (match_operand:QI 3 "nonimmediate_operand" ""))
+	   (const_int 0)]))
+   (set (match_operand:QI 1 "nonimmediate_operand" "")
+	(not:QI (match_dup 3)))]
   "ix86_match_ccmode (insn, CCNOmode)"
-  [(parallel [(set (reg:CCNO FLAGS_REG)
-		   (compare:CCNO (xor:QI (match_dup 1) (const_int -1))
-		      		 (const_int 0)))
-	      (set (match_dup 0)
-		   (xor:QI (match_dup 1) (const_int -1)))])]
+  [(parallel [(set (match_dup 0)
+		   (match_op_dup 2 [(xor:QI (match_dup 3) (const_int -1))
+		      		    (const_int 0)]))
+	      (set (match_dup 1)
+		   (xor:QI (match_dup 3) (const_int -1)))])]
   "")
 
 ;; Arithmetic shift instructions
@@ -18843,52 +18849,56 @@
 ; instruction size is unchanged, except in the %eax case for
 ; which it is increased by one byte, hence the ! optimize_size.
 (define_split
-  [(set (reg FLAGS_REG)
-	(compare (and (match_operand 1 "aligned_operand" "")
-		      (match_operand 2 "const_int_operand" ""))
-		 (const_int 0)))
-   (set (match_operand 0 "register_operand" "")
-	(and (match_dup 1) (match_dup 2)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 2 "compare_operator"
+	  [(and (match_operand 3 "aligned_operand" "")
+		(match_operand 4 "const_int_operand" ""))
+	   (const_int 0)]))
+   (set (match_operand 1 "register_operand" "")
+	(and (match_dup 3) (match_dup 4)))]
   "! TARGET_PARTIAL_REG_STALL && reload_completed
    /* Ensure that the operand will remain sign-extended immediate.  */
-   && ix86_match_ccmode (insn, INTVAL (operands[2]) >= 0 ? CCNOmode : CCZmode)
+   && ix86_match_ccmode (insn, INTVAL (operands[4]) >= 0 ? CCNOmode : CCZmode)
    && ! optimize_size
-   && ((GET_MODE (operands[0]) == HImode && ! TARGET_FAST_PREFIX)
-       || (GET_MODE (operands[0]) == QImode && TARGET_PROMOTE_QImode))"
-  [(parallel [(set (reg:CCNO FLAGS_REG)
-		   (compare:CCNO (and:SI (match_dup 1) (match_dup 2))
-			         (const_int 0)))
-	      (set (match_dup 0)
-		   (and:SI (match_dup 1) (match_dup 2)))])]
-  "operands[2]
-     = gen_int_mode (INTVAL (operands[2])
-		     & GET_MODE_MASK (GET_MODE (operands[0])),
-		     SImode);
-   operands[0] = gen_lowpart (SImode, operands[0]);
-   operands[1] = gen_lowpart (SImode, operands[1]);")
+   && ((GET_MODE (operands[1]) == HImode && ! TARGET_FAST_PREFIX)
+       || (GET_MODE (operands[1]) == QImode && TARGET_PROMOTE_QImode))"
+  [(parallel [(set (match_dup 0)
+		   (match_op_dup 2 [(and:SI (match_dup 3) (match_dup 4))
+			            (const_int 0)]))
+	      (set (match_dup 1)
+		   (and:SI (match_dup 3) (match_dup 4)))])]
+{
+  operands[4]
+    = gen_int_mode (INTVAL (operands[4])
+		    & GET_MODE_MASK (GET_MODE (operands[1])), SImode);
+  operands[1] = gen_lowpart (SImode, operands[1]);
+  operands[3] = gen_lowpart (SImode, operands[3]);
+})
 
 ; Don't promote the QImode tests, as i386 doesn't have encoding of
 ; the TEST instruction with 32-bit sign-extended immediate and thus
 ; the instruction size would at least double, which is not what we
 ; want even with ! optimize_size.
 (define_split
-  [(set (reg FLAGS_REG)
-	(compare (and (match_operand:HI 0 "aligned_operand" "")
-		      (match_operand:HI 1 "const_int_operand" ""))
-		 (const_int 0)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 1 "compare_operator"
+	  [(and (match_operand:HI 2 "aligned_operand" "")
+		(match_operand:HI 3 "const_int_operand" ""))
+	   (const_int 0)]))]
   "! TARGET_PARTIAL_REG_STALL && reload_completed
    /* Ensure that the operand will remain sign-extended immediate.  */
-   && ix86_match_ccmode (insn, INTVAL (operands[1]) >= 0 ? CCNOmode : CCZmode)
+   && ix86_match_ccmode (insn, INTVAL (operands[3]) >= 0 ? CCNOmode : CCZmode)
    && ! TARGET_FAST_PREFIX
    && ! optimize_size"
-  [(set (reg:CCNO FLAGS_REG)
-	(compare:CCNO (and:SI (match_dup 0) (match_dup 1))
-		      (const_int 0)))]
-  "operands[1]
-     = gen_int_mode (INTVAL (operands[1])
-		     & GET_MODE_MASK (GET_MODE (operands[0])),
-		     SImode);
-   operands[0] = gen_lowpart (SImode, operands[0]);")
+  [(set (match_dup 0)
+	(match_op_dup 1 [(and:SI (match_dup 2) (match_dup 3))
+		         (const_int 0)]))]
+{
+  operands[3]
+    = gen_int_mode (INTVAL (operands[3])
+		    & GET_MODE_MASK (GET_MODE (operands[2])), SImode);
+  operands[2] = gen_lowpart (SImode, operands[2]);
+})
 
 (define_split
   [(set (match_operand 0 "register_operand" "")
@@ -19061,13 +19071,14 @@
 
 ;; Don't compare memory with zero, load and use a test instead.
 (define_peephole2
-  [(set (reg FLAGS_REG)
-	(compare (match_operand:SI 0 "memory_operand" "")
-	         (const_int 0)))
+  [(set (match_operand 0 "flags_reg_operand" "")
+ 	(match_operator 1 "compare_operator"
+	  [(match_operand:SI 2 "memory_operand" "")
+	   (const_int 0)]))
    (match_scratch:SI 3 "r")]
   "ix86_match_ccmode (insn, CCNOmode) && ! optimize_size"
-  [(set (match_dup 3) (match_dup 0))
-   (set (reg:CCNO FLAGS_REG) (compare:CCNO (match_dup 3) (const_int 0)))]
+  [(set (match_dup 3) (match_dup 2))
+   (set (match_dup 0) (match_op_dup 1 [(match_dup 3) (const_int 0)]))]
   "")
 
 ;; NOT is not pairable on Pentium, while XOR is, but one byte longer. 
@@ -19131,77 +19142,77 @@
 ;; versions if we're concerned about partial register stalls.
 
 (define_peephole2
-  [(set (reg FLAGS_REG)
-	(compare (and:SI (match_operand:SI 0 "register_operand" "")
-			 (match_operand:SI 1 "immediate_operand" ""))
-		 (const_int 0)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 1 "compare_operator"
+	  [(and:SI (match_operand:SI 2 "register_operand" "")
+		   (match_operand:SI 3 "immediate_operand" ""))
+	   (const_int 0)]))]
   "ix86_match_ccmode (insn, CCNOmode)
-   && (true_regnum (operands[0]) != 0
-       || (GET_CODE (operands[1]) == CONST_INT
-	   && CONST_OK_FOR_LETTER_P (INTVAL (operands[1]), 'K')))
-   && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
+   && (true_regnum (operands[2]) != 0
+       || (GET_CODE (operands[3]) == CONST_INT
+	   && CONST_OK_FOR_LETTER_P (INTVAL (operands[3]), 'K')))
+   && peep2_reg_dead_p (1, operands[2])"
   [(parallel
-     [(set (reg:CCNO FLAGS_REG)
-	   (compare:CCNO (and:SI (match_dup 0)
-			         (match_dup 1))
-		         (const_int 0)))
-      (set (match_dup 0)
-	   (and:SI (match_dup 0) (match_dup 1)))])]
+     [(set (match_dup 0)
+	   (match_op_dup 1 [(and:SI (match_dup 2) (match_dup 3))
+		            (const_int 0)]))
+      (set (match_dup 2)
+	   (and:SI (match_dup 2) (match_dup 3)))])]
   "")
 
 ;; We don't need to handle HImode case, because it will be promoted to SImode
 ;; on ! TARGET_PARTIAL_REG_STALL
 
 (define_peephole2
-  [(set (reg FLAGS_REG)
-	(compare (and:QI (match_operand:QI 0 "register_operand" "")
-			 (match_operand:QI 1 "immediate_operand" ""))
-		 (const_int 0)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 1 "compare_operator"
+	  [(and:QI (match_operand:QI 2 "register_operand" "")
+		   (match_operand:QI 3 "immediate_operand" ""))
+	   (const_int 0)]))]
   "! TARGET_PARTIAL_REG_STALL
    && ix86_match_ccmode (insn, CCNOmode)
-   && true_regnum (operands[0]) != 0
-   && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
+   && true_regnum (operands[2]) != 0
+   && peep2_reg_dead_p (1, operands[2])"
   [(parallel
-     [(set (reg:CCNO FLAGS_REG)
-	   (compare:CCNO (and:QI (match_dup 0)
- 			         (match_dup 1))
-		         (const_int 0)))
-      (set (match_dup 0)
-	   (and:QI (match_dup 0) (match_dup 1)))])]
+     [(set (match_dup 0)
+	   (match_op_dup 1 [(and:QI (match_dup 2) (match_dup 3))
+		            (const_int 0)]))
+      (set (match_dup 2)
+	   (and:QI (match_dup 2) (match_dup 3)))])]
   "")
 
 (define_peephole2
-  [(set (reg FLAGS_REG)
-	(compare
-	  (and:SI
-	    (zero_extract:SI
-	      (match_operand 0 "ext_register_operand" "")
-	      (const_int 8)
-	      (const_int 8))
-	    (match_operand 1 "const_int_operand" ""))
-	  (const_int 0)))]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 1 "compare_operator"
+	  [(and:SI
+	     (zero_extract:SI
+	       (match_operand 2 "ext_register_operand" "")
+	       (const_int 8)
+	       (const_int 8))
+	     (match_operand 3 "const_int_operand" ""))
+	   (const_int 0)]))]
   "! TARGET_PARTIAL_REG_STALL
    && ix86_match_ccmode (insn, CCNOmode)
-   && true_regnum (operands[0]) != 0
-   && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CCNO FLAGS_REG)
-		   (compare:CCNO
-		       (and:SI
-			 (zero_extract:SI
-			 (match_dup 0)
-			 (const_int 8)
-			 (const_int 8))
-			(match_dup 1))
-		   (const_int 0)))
-	      (set (zero_extract:SI (match_dup 0)
+   && true_regnum (operands[2]) != 0
+   && peep2_reg_dead_p (1, operands[2])"
+  [(parallel [(set (match_dup 0)
+		   (match_op_dup 1
+		     [(and:SI
+			(zero_extract:SI
+			  (match_dup 2)
+			  (const_int 8)
+			  (const_int 8))
+			(match_dup 3))
+		      (const_int 0)]))
+	      (set (zero_extract:SI (match_dup 2)
 				    (const_int 8)
 				    (const_int 8))
 		   (and:SI 
 		     (zero_extract:SI
-		       (match_dup 0)
+		       (match_dup 2)
 		       (const_int 8)
 		       (const_int 8))
-		     (match_dup 1)))])]
+		     (match_dup 3)))])]
   "")
 
 ;; Don't do logical operations with memory inputs.
@@ -19503,66 +19514,20 @@
   "")
 
 ;; Convert compares with 1 to shorter inc/dec operations when CF is not
-;; required and register dies.
+;; required and register dies.  Similarly for 128 to plus -128.
 (define_peephole2
-  [(set (reg FLAGS_REG)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (match_operand:SI 1 "incdec_operand" "")))]
-  "ix86_match_ccmode (insn, CCGCmode)
-   && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CCGC FLAGS_REG)
-		   (compare:CCGC (match_dup 0)
-				 (match_dup 1)))
-	      (clobber (match_dup 0))])]
-  "")
-
-(define_peephole2
-  [(set (reg FLAGS_REG)
-	(compare (match_operand:HI 0 "register_operand" "")
-		 (match_operand:HI 1 "incdec_operand" "")))]
-  "ix86_match_ccmode (insn, CCGCmode)
-   && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CCGC FLAGS_REG)
-		   (compare:CCGC (match_dup 0)
-				 (match_dup 1)))
-	      (clobber (match_dup 0))])]
-  "")
-
-(define_peephole2
-  [(set (reg FLAGS_REG)
-	(compare (match_operand:QI 0 "register_operand" "")
-		 (match_operand:QI 1 "incdec_operand" "")))]
-  "ix86_match_ccmode (insn, CCGCmode)
-   && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CCGC FLAGS_REG)
-		   (compare:CCGC (match_dup 0)
-				 (match_dup 1)))
-	      (clobber (match_dup 0))])]
-  "")
-
-;; Convert compares with 128 to shorter add -128
-(define_peephole2
-  [(set (reg FLAGS_REG)
-	(compare (match_operand:SI 0 "register_operand" "")
-		 (const_int 128)))]
-  "ix86_match_ccmode (insn, CCGCmode)
-   && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CCGC FLAGS_REG)
-		   (compare:CCGC (match_dup 0)
-			         (const_int 128)))
-	      (clobber (match_dup 0))])]
-  "")
-
-(define_peephole2
-  [(set (reg FLAGS_REG)
-	(compare (match_operand:HI 0 "register_operand" "")
-		 (const_int 128)))]
-  "ix86_match_ccmode (insn, CCGCmode)
-   && find_regno_note (insn, REG_DEAD, true_regnum (operands[0]))"
-  [(parallel [(set (reg:CCGC FLAGS_REG)
-		   (compare:CCGC (match_dup 0)
-			         (const_int 128)))
-	      (clobber (match_dup 0))])]
+  [(set (match_operand 0 "flags_reg_operand" "")
+	(match_operator 1 "compare_operator"
+	  [(match_operand 2 "register_operand" "")
+	   (match_operand 3 "const_int_operand" "")]))]
+  "(INTVAL (operands[3]) == -1
+    || INTVAL (operands[3]) == 1
+    || INTVAL (operands[3]) == 128)
+   && ix86_match_ccmode (insn, CCGCmode)
+   && peep2_reg_dead_p (1, operands[2])"
+  [(parallel [(set (match_dup 0)
+		   (match_op_dup 1 [(match_dup 2) (match_dup 3)]))
+	      (clobber (match_dup 2))])]
   "")
 
 (define_peephole2
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 9154aea8c62..a3721a5abe7 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -833,3 +833,6 @@
 (define_predicate "cmpsi_operand"
   (ior (match_operand 0 "nonimmediate_operand")
        (match_operand 0 "cmpsi_operand_1")))
+
+(define_predicate "compare_operator"
+  (match_code "compare"))