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authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2011-03-21 21:38:56 +0000
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>2011-03-21 21:38:56 +0000
commit39c56a8941d733a2a572575fc7a359cd86a0d662 (patch)
tree0538178eac12adad63a9e0919a608a535b270ab9
parentaf9af376707e59fc011ce62ec69b4cd4196a0db5 (diff)
downloadgcc-39c56a8941d733a2a572575fc7a359cd86a0d662.tar.gz
gcc/
2011-03-21 Richard Sandiford <richard.sandiford@linaro.org> * expr.h (prepare_operand): Move to... * optabs.h (prepare_operand): ...here and change the insn code parameter from "int" to "enum insn_code". (insn_operand_matches): Declare. * expr.c (init_expr_target): Use insn_operand_matches. (compress_float_constant): Likewise. * function.c (safe_insn_predicate, assign_parm_setup_reg): Likewise. * optabs.c (can_compare_p, prepare_cmp_insn): Likewise. (emit_cmp_and_jump_insn_1, gen_add2_insn, gen_add3_insn): Likewise. (have_add2_insn, gen_sub2_insn, gen_sub3_insn, have_sub2_insn): Likewise. (gen_cond_trap): Likewise. (prepare_operand): Likewise. Change icode to an insn_code. (insn_operand_matches): New function. * reload.c (find_reloads_address_1): Use insn_operand_matches. * reload1.c (gen_reload): Likewise. * targhooks.c (default_secondary_reload): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@171270 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog19
-rw-r--r--gcc/expr.c4
-rw-r--r--gcc/expr.h3
-rw-r--r--gcc/function.c15
-rw-r--r--gcc/optabs.c107
-rw-r--r--gcc/optabs.h6
-rw-r--r--gcc/reload.c8
-rw-r--r--gcc/reload1.c7
-rw-r--r--gcc/targhooks.c3
9 files changed, 85 insertions, 87 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 16cdafa64ea..4c0e0ca107e 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,22 @@
+2011-03-21 Richard Sandiford <richard.sandiford@linaro.org>
+
+ * expr.h (prepare_operand): Move to...
+ * optabs.h (prepare_operand): ...here and change the insn code
+ parameter from "int" to "enum insn_code".
+ (insn_operand_matches): Declare.
+ * expr.c (init_expr_target): Use insn_operand_matches.
+ (compress_float_constant): Likewise.
+ * function.c (safe_insn_predicate, assign_parm_setup_reg): Likewise.
+ * optabs.c (can_compare_p, prepare_cmp_insn): Likewise.
+ (emit_cmp_and_jump_insn_1, gen_add2_insn, gen_add3_insn): Likewise.
+ (have_add2_insn, gen_sub2_insn, gen_sub3_insn, have_sub2_insn): Likewise.
+ (gen_cond_trap): Likewise.
+ (prepare_operand): Likewise. Change icode to an insn_code.
+ (insn_operand_matches): New function.
+ * reload.c (find_reloads_address_1): Use insn_operand_matches.
+ * reload1.c (gen_reload): Likewise.
+ * targhooks.c (default_secondary_reload): Likewise.
+
2011-03-21 Uros Bizjak <ubizjak@gmail.com>
* config/alpha/alpha.md (unspec): New define_c_enum.
diff --git a/gcc/expr.c b/gcc/expr.c
index dc8366d0ae1..64ddde7a54f 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -286,7 +286,7 @@ init_expr_target (void)
PUT_MODE (mem, srcmode);
- if ((*insn_data[ic].operand[1].predicate) (mem, srcmode))
+ if (insn_operand_matches (ic, 1, mem))
float_extend_from_mem[mode][srcmode] = true;
}
}
@@ -3446,7 +3446,7 @@ compress_float_constant (rtx x, rtx y)
{
/* Skip if the target needs extra instructions to perform
the extension. */
- if (! (*insn_data[ic].operand[1].predicate) (trunc_y, srcmode))
+ if (!insn_operand_matches (ic, 1, trunc_y))
continue;
/* This is valid, but may not be cheaper than the original. */
newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
diff --git a/gcc/expr.h b/gcc/expr.h
index b6e6e6b0cab..f770a35b6de 100644
--- a/gcc/expr.h
+++ b/gcc/expr.h
@@ -173,9 +173,6 @@ extern rtx expand_simple_unop (enum machine_mode, enum rtx_code, rtx, rtx,
perform the operation described by CODE and MODE. */
extern int have_insn_for (enum rtx_code, enum machine_mode);
-extern rtx prepare_operand (int, rtx, int, enum machine_mode, enum machine_mode,
- int);
-
/* Emit code to make a call to a constant function or a library call. */
extern void emit_libcall_block (rtx, rtx, rtx, rtx);
diff --git a/gcc/function.c b/gcc/function.c
index 64950a1a799..a1ea482acad 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -1493,16 +1493,7 @@ instantiate_virtual_regs_in_rtx (rtx *loc, void *data)
static int
safe_insn_predicate (int code, int operand, rtx x)
{
- const struct insn_operand_data *op_data;
-
- if (code < 0)
- return true;
-
- op_data = &insn_data[code].operand[operand];
- if (op_data->predicate == NULL)
- return true;
-
- return op_data->predicate (x, op_data->mode);
+ return code < 0 || insn_operand_matches ((enum insn_code) code, operand, x);
}
/* A subroutine of instantiate_virtual_regs. Instantiate any virtual
@@ -3013,8 +3004,8 @@ assign_parm_setup_reg (struct assign_parm_data_all *all, tree parm,
op0 = parmreg;
op1 = validated_mem;
if (icode != CODE_FOR_nothing
- && insn_data[icode].operand[0].predicate (op0, promoted_nominal_mode)
- && insn_data[icode].operand[1].predicate (op1, data->passed_mode))
+ && insn_operand_matches (icode, 0, op0)
+ && insn_operand_matches (icode, 1, op1))
{
enum rtx_code code = unsignedp ? ZERO_EXTEND : SIGN_EXTEND;
rtx insn, insns;
diff --git a/gcc/optabs.c b/gcc/optabs.c
index 6be8db03cce..a874c427e43 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -3943,15 +3943,15 @@ can_compare_p (enum rtx_code code, enum machine_mode mode,
test = gen_rtx_fmt_ee (code, mode, const0_rtx, const0_rtx);
do
{
- int icode;
+ enum insn_code icode;
if (purpose == ccp_jump
&& (icode = optab_handler (cbranch_optab, mode)) != CODE_FOR_nothing
- && insn_data[icode].operand[0].predicate (test, mode))
+ && insn_operand_matches (icode, 0, test))
return 1;
if (purpose == ccp_store_flag
&& (icode = optab_handler (cstore_optab, mode)) != CODE_FOR_nothing
- && insn_data[icode].operand[1].predicate (test, mode))
+ && insn_operand_matches (icode, 1, test))
return 1;
if (purpose == ccp_cmov
&& optab_handler (cmov_optab, mode) != CODE_FOR_nothing)
@@ -4112,16 +4112,14 @@ prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
enum insn_code icode;
icode = optab_handler (cbranch_optab, cmp_mode);
if (icode != CODE_FOR_nothing
- && insn_data[icode].operand[0].predicate (test, VOIDmode))
+ && insn_operand_matches (icode, 0, test))
{
rtx last = get_last_insn ();
rtx op0 = prepare_operand (icode, x, 1, mode, cmp_mode, unsignedp);
rtx op1 = prepare_operand (icode, y, 2, mode, cmp_mode, unsignedp);
if (op0 && op1
- && insn_data[icode].operand[1].predicate
- (op0, insn_data[icode].operand[1].mode)
- && insn_data[icode].operand[2].predicate
- (op1, insn_data[icode].operand[2].mode))
+ && insn_operand_matches (icode, 1, op0)
+ && insn_operand_matches (icode, 2, op1))
{
XEXP (test, 0) = op0;
XEXP (test, 1) = op1;
@@ -4200,18 +4198,17 @@ prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
that it is accepted by the operand predicate. Return the new value. */
rtx
-prepare_operand (int icode, rtx x, int opnum, enum machine_mode mode,
+prepare_operand (enum insn_code icode, rtx x, int opnum, enum machine_mode mode,
enum machine_mode wider_mode, int unsignedp)
{
if (mode != wider_mode)
x = convert_modes (wider_mode, mode, x, unsignedp);
- if (!insn_data[icode].operand[opnum].predicate
- (x, insn_data[icode].operand[opnum].mode))
+ if (!insn_operand_matches (icode, opnum, x))
{
if (reload_completed)
return NULL_RTX;
- x = copy_to_mode_reg (insn_data[icode].operand[opnum].mode, x);
+ x = copy_to_mode_reg (insn_data[(int) icode].operand[opnum].mode, x);
}
return x;
@@ -4232,7 +4229,7 @@ emit_cmp_and_jump_insn_1 (rtx test, enum machine_mode mode, rtx label)
icode = optab_handler (cbranch_optab, optab_mode);
gcc_assert (icode != CODE_FOR_nothing);
- gcc_assert (insn_data[icode].operand[0].predicate (test, VOIDmode));
+ gcc_assert (insn_operand_matches (icode, 0, test));
emit_jump_insn (GEN_FCN (icode) (test, XEXP (test, 0), XEXP (test, 1), label));
}
@@ -4699,14 +4696,11 @@ emit_conditional_add (rtx target, enum rtx_code code, rtx op0, rtx op1,
rtx
gen_add2_insn (rtx x, rtx y)
{
- int icode = (int) optab_handler (add_optab, GET_MODE (x));
+ enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
- gcc_assert (insn_data[icode].operand[0].predicate
- (x, insn_data[icode].operand[0].mode));
- gcc_assert (insn_data[icode].operand[1].predicate
- (x, insn_data[icode].operand[1].mode));
- gcc_assert (insn_data[icode].operand[2].predicate
- (y, insn_data[icode].operand[2].mode));
+ gcc_assert (insn_operand_matches (icode, 0, x));
+ gcc_assert (insn_operand_matches (icode, 1, x));
+ gcc_assert (insn_operand_matches (icode, 2, y));
return GEN_FCN (icode) (x, x, y);
}
@@ -4717,15 +4711,12 @@ gen_add2_insn (rtx x, rtx y)
rtx
gen_add3_insn (rtx r0, rtx r1, rtx c)
{
- int icode = (int) optab_handler (add_optab, GET_MODE (r0));
+ enum insn_code icode = optab_handler (add_optab, GET_MODE (r0));
if (icode == CODE_FOR_nothing
- || !(insn_data[icode].operand[0].predicate
- (r0, insn_data[icode].operand[0].mode))
- || !(insn_data[icode].operand[1].predicate
- (r1, insn_data[icode].operand[1].mode))
- || !(insn_data[icode].operand[2].predicate
- (c, insn_data[icode].operand[2].mode)))
+ || !insn_operand_matches (icode, 0, r0)
+ || !insn_operand_matches (icode, 1, r1)
+ || !insn_operand_matches (icode, 2, c))
return NULL_RTX;
return GEN_FCN (icode) (r0, r1, c);
@@ -4734,21 +4725,18 @@ gen_add3_insn (rtx r0, rtx r1, rtx c)
int
have_add2_insn (rtx x, rtx y)
{
- int icode;
+ enum insn_code icode;
gcc_assert (GET_MODE (x) != VOIDmode);
- icode = (int) optab_handler (add_optab, GET_MODE (x));
+ icode = optab_handler (add_optab, GET_MODE (x));
if (icode == CODE_FOR_nothing)
return 0;
- if (!(insn_data[icode].operand[0].predicate
- (x, insn_data[icode].operand[0].mode))
- || !(insn_data[icode].operand[1].predicate
- (x, insn_data[icode].operand[1].mode))
- || !(insn_data[icode].operand[2].predicate
- (y, insn_data[icode].operand[2].mode)))
+ if (!insn_operand_matches (icode, 0, x)
+ || !insn_operand_matches (icode, 1, x)
+ || !insn_operand_matches (icode, 2, y))
return 0;
return 1;
@@ -4759,14 +4747,11 @@ have_add2_insn (rtx x, rtx y)
rtx
gen_sub2_insn (rtx x, rtx y)
{
- int icode = (int) optab_handler (sub_optab, GET_MODE (x));
+ enum insn_code icode = optab_handler (sub_optab, GET_MODE (x));
- gcc_assert (insn_data[icode].operand[0].predicate
- (x, insn_data[icode].operand[0].mode));
- gcc_assert (insn_data[icode].operand[1].predicate
- (x, insn_data[icode].operand[1].mode));
- gcc_assert (insn_data[icode].operand[2].predicate
- (y, insn_data[icode].operand[2].mode));
+ gcc_assert (insn_operand_matches (icode, 0, x));
+ gcc_assert (insn_operand_matches (icode, 1, x));
+ gcc_assert (insn_operand_matches (icode, 2, y));
return GEN_FCN (icode) (x, x, y);
}
@@ -4777,15 +4762,12 @@ gen_sub2_insn (rtx x, rtx y)
rtx
gen_sub3_insn (rtx r0, rtx r1, rtx c)
{
- int icode = (int) optab_handler (sub_optab, GET_MODE (r0));
+ enum insn_code icode = optab_handler (sub_optab, GET_MODE (r0));
if (icode == CODE_FOR_nothing
- || !(insn_data[icode].operand[0].predicate
- (r0, insn_data[icode].operand[0].mode))
- || !(insn_data[icode].operand[1].predicate
- (r1, insn_data[icode].operand[1].mode))
- || !(insn_data[icode].operand[2].predicate
- (c, insn_data[icode].operand[2].mode)))
+ || !insn_operand_matches (icode, 0, r0)
+ || !insn_operand_matches (icode, 1, r1)
+ || !insn_operand_matches (icode, 2, c))
return NULL_RTX;
return GEN_FCN (icode) (r0, r1, c);
@@ -4794,21 +4776,18 @@ gen_sub3_insn (rtx r0, rtx r1, rtx c)
int
have_sub2_insn (rtx x, rtx y)
{
- int icode;
+ enum insn_code icode;
gcc_assert (GET_MODE (x) != VOIDmode);
- icode = (int) optab_handler (sub_optab, GET_MODE (x));
+ icode = optab_handler (sub_optab, GET_MODE (x));
if (icode == CODE_FOR_nothing)
return 0;
- if (!(insn_data[icode].operand[0].predicate
- (x, insn_data[icode].operand[0].mode))
- || !(insn_data[icode].operand[1].predicate
- (x, insn_data[icode].operand[1].mode))
- || !(insn_data[icode].operand[2].predicate
- (y, insn_data[icode].operand[2].mode)))
+ if (!insn_operand_matches (icode, 0, x)
+ || !insn_operand_matches (icode, 1, x)
+ || !insn_operand_matches (icode, 2, y))
return 0;
return 1;
@@ -6643,8 +6622,7 @@ gen_cond_trap (enum rtx_code code, rtx op1, rtx op2, rtx tcode)
return 0;
/* Some targets only accept a zero trap code. */
- if (insn_data[icode].operand[3].predicate
- && !insn_data[icode].operand[3].predicate (tcode, VOIDmode))
+ if (!insn_operand_matches (icode, 3, tcode))
return 0;
do_pending_stack_adjust ();
@@ -7329,5 +7307,16 @@ expand_sync_lock_test_and_set (rtx mem, rtx val, rtx target)
return NULL_RTX;
}
+
+/* Return true if OPERAND is suitable for operand number OPNO of
+ instruction ICODE. */
+
+bool
+insn_operand_matches (enum insn_code icode, unsigned int opno, rtx operand)
+{
+ return (!insn_data[(int) icode].operand[opno].predicate
+ || (insn_data[(int) icode].operand[opno].predicate
+ (operand, insn_data[(int) icode].operand[opno].mode)));
+}
#include "gt-optabs.h"
diff --git a/gcc/optabs.h b/gcc/optabs.h
index 2c63a43823a..1849a30bfe5 100644
--- a/gcc/optabs.h
+++ b/gcc/optabs.h
@@ -923,4 +923,10 @@ set_direct_optab_handler (direct_optab op, enum machine_mode mode,
extern rtx optab_libfunc (optab optab, enum machine_mode mode);
extern rtx convert_optab_libfunc (convert_optab optab, enum machine_mode mode1,
enum machine_mode mode2);
+
+extern bool insn_operand_matches (enum insn_code icode, unsigned int opno,
+ rtx operand);
+extern rtx prepare_operand (enum insn_code, rtx, int, enum machine_mode,
+ enum machine_mode, int);
+
#endif /* GCC_OPTABS_H */
diff --git a/gcc/reload.c b/gcc/reload.c
index 714355c3201..7c8d78effd1 100644
--- a/gcc/reload.c
+++ b/gcc/reload.c
@@ -5819,17 +5819,15 @@ find_reloads_address_1 (enum machine_mode mode, rtx x, int context,
rtx equiv = (MEM_P (XEXP (x, 0))
? XEXP (x, 0)
: reg_equiv_mem[regno]);
- int icode = (int) optab_handler (add_optab, GET_MODE (x));
+ enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
if (insn && NONJUMP_INSN_P (insn) && equiv
&& memory_operand (equiv, GET_MODE (equiv))
#ifdef HAVE_cc0
&& ! sets_cc0_p (PATTERN (insn))
#endif
&& ! (icode != CODE_FOR_nothing
- && ((*insn_data[icode].operand[0].predicate)
- (equiv, GET_MODE (x)))
- && ((*insn_data[icode].operand[1].predicate)
- (equiv, GET_MODE (x)))))
+ && insn_operand_matches (icode, 0, equiv)
+ && insn_operand_matches (icode, 1, equiv)))
{
/* We use the original pseudo for loc, so that
emit_reload_insns() knows which pseudo this
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 3d58e5877cf..9b2bc259c42 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -8479,7 +8479,7 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
not valid than to dummy things up. */
rtx op0, op1, tem, insn;
- int code;
+ enum insn_code code;
op0 = find_replacement (&XEXP (in, 0));
op1 = find_replacement (&XEXP (in, 1));
@@ -8517,14 +8517,13 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
DEFINE_PEEPHOLE should be specified that recognizes the sequence
we emit below. */
- code = (int) optab_handler (add_optab, GET_MODE (out));
+ code = optab_handler (add_optab, GET_MODE (out));
if (CONSTANT_P (op1) || MEM_P (op1) || GET_CODE (op1) == SUBREG
|| (REG_P (op1)
&& REGNO (op1) >= FIRST_PSEUDO_REGISTER)
|| (code != CODE_FOR_nothing
- && ! ((*insn_data[code].operand[2].predicate)
- (op1, insn_data[code].operand[2].mode))))
+ && !insn_operand_matches (code, 2, op1)))
tem = op0, op0 = op1, op1 = tem;
gen_reload (out, op0, opnum, type);
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index 225831b9515..6411973b8b9 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -893,8 +893,7 @@ default_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,
reload_mode);
if (icode != CODE_FOR_nothing
- && insn_data[(int) icode].operand[in_p].predicate
- && ! insn_data[(int) icode].operand[in_p].predicate (x, reload_mode))
+ && !insn_operand_matches (icode, in_p, x))
icode = CODE_FOR_nothing;
else if (icode != CODE_FOR_nothing)
{