diff options
| author | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1998-04-01 05:20:26 +0000 |
|---|---|---|
| committer | law <law@138bc75d-0d04-0410-961f-82ee72b054a4> | 1998-04-01 05:20:26 +0000 |
| commit | cc51d4989fbd3a1ea3629acf0754c810134263f9 (patch) | |
| tree | 84f0e70b65ebdc968e5fa3ba0c8eac667a10255b | |
| parent | 7a1f3a7953f5e6ad6df7c262d39348c9599619fc (diff) | |
| download | gcc-cc51d4989fbd3a1ea3629acf0754c810134263f9.tar.gz | |
* 1750a.md, arm.c, clipper.c, clipper.md: Use GEN_INT consistently.
* convex.h, dsp16xx.c, fx80.md, gmicro.c, gmicro.md: Likewise.
* i370.h, i370.md, i860.c, i860.h, i860.md, i960.c: Likewise.
* i960.h, i960.md, m32r.md, m68k.md, m68kv4.h, m88k.c: Likewise.
* m88k.md, ns32k.c, ns32k.md, pdp11.c, pdp11.h, pdp11.md: Likewise.
* pyr.c, pyr.h, pyr.md, romp.c, romp.h, romp.md: Likewise.
* rs6000.md, sparc.c, sparc.h, sparc.md, spur.c, spur.md: Likewise.
* tahoe.md, vax.h, vax.md, we32k.c, we32k.h, we32k.md: Likewise.
* md.texi: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@18927 138bc75d-0d04-0410-961f-82ee72b054a4
47 files changed, 484 insertions, 567 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6df9fe7fb79..4ed42ee4ba6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +Wed Apr 1 06:09:53 1998 Jeffrey A Law (law@cygnus.com) + + * 1750a.md, arm.c, clipper.c, clipper.md: Use GEN_INT consistently. + * convex.h, dsp16xx.c, fx80.md, gmicro.c, gmicro.md: Likewise. + * i370.h, i370.md, i860.c, i860.h, i860.md, i960.c: Likewise. + * i960.h, i960.md, m32r.md, m68k.md, m68kv4.h, m88k.c: Likewise. + * m88k.md, ns32k.c, ns32k.md, pdp11.c, pdp11.h, pdp11.md: Likewise. + * pyr.c, pyr.h, pyr.md, romp.c, romp.h, romp.md: Likewise. + * rs6000.md, sparc.c, sparc.h, sparc.md, spur.c, spur.md: Likewise. + * tahoe.md, vax.h, vax.md, we32k.c, we32k.h, we32k.md: Likewise. + * md.texi: Likewise. + Wed Apr 1 08:33:44 1998 Manfred Hollstein <manfred@s-direktnet.de> * fixincludes (limits.h): Fix nested comments in Motorola's diff --git a/gcc/config/1750a/1750a.md b/gcc/config/1750a/1750a.md index 72fa0b38f47..cff2d9291b8 100644 --- a/gcc/config/1750a/1750a.md +++ b/gcc/config/1750a/1750a.md @@ -669,7 +669,7 @@ rtx new_opnds[4]; new_opnds[0] = operands[0]; new_opnds[1] = operands[1]; - new_opnds[2] = gen_rtx (CONST_INT, VOIDmode, -INTVAL(operands[2])); + new_opnds[2] = GEN_INT (-INTVAL(operands[2])); new_opnds[3] = operands[3]; istr = \"disn\"; return mod_regno_adjust (istr, new_opnds); @@ -1105,7 +1105,7 @@ ;******************** ;; Bit field instructions, general cases. -;; "o,d" constraint causes a nonoffsetable memref to match the "o" +;; "o,d" constraint causes a nonoffsettable memref to match the "o" ;; so that its address is reloaded. ;; (define_insn "extv" ... @@ -1381,7 +1381,7 @@ ; "" ; "* ; { -; rtx oprnd = gen_rtx(CONST_INT,VOIDmode,get_frame_size()); +; rtx oprnd = GEN_INT (get_frame_size()); ; output_asm_insn(\"ret.m %0\",&oprnd); ; return \"\;\"; ; } ") diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 5e12e8d30f6..6a0f593b9f3 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -5020,8 +5020,7 @@ output_func_epilogue (f, frame_size) { /* Unwind the pre-pushed regs */ operands[0] = operands[1] = stack_pointer_rtx; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - current_function_pretend_args_size); + operands[2] = GEN_INT (current_function_pretend_args_size); output_add_immediate (operands); } /* And finally, go home */ diff --git a/gcc/config/clipper/clipper.c b/gcc/config/clipper/clipper.c index 20da229eae1..4bee0e6aaa7 100644 --- a/gcc/config/clipper/clipper.c +++ b/gcc/config/clipper/clipper.c @@ -19,8 +19,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include <stdio.h> #include "config.h" +#include <stdio.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -387,10 +387,10 @@ clipper_builtin_saveregs (arglist) addr = copy_to_reg (XEXP (block, 0)); - f0_addr = gen_rtx (PLUS, Pmode, addr, gen_rtx (CONST_INT, Pmode, 24)); - f1_addr = gen_rtx (PLUS, Pmode, addr, gen_rtx (CONST_INT, Pmode, 32)); - r0_addr = gen_rtx (PLUS, Pmode, addr, gen_rtx (CONST_INT, Pmode, 40)); - r1_addr = gen_rtx (PLUS, Pmode, addr, gen_rtx (CONST_INT, Pmode, 44)); + f0_addr = gen_rtx (PLUS, Pmode, addr, GEN_INT (24)); + f1_addr = gen_rtx (PLUS, Pmode, addr, GEN_INT (32)); + r0_addr = gen_rtx (PLUS, Pmode, addr, GEN_INT (40)); + r1_addr = gen_rtx (PLUS, Pmode, addr, GEN_INT (44)); /* Store float regs */ @@ -416,47 +416,61 @@ clipper_builtin_saveregs (arglist) emit_move_insn (scratch, r0_addr); emit_move_insn (gen_rtx (MEM, SImode, gen_rtx (PLUS, Pmode, addr, - gen_rtx (CONST_INT, Pmode, 4))), + GEN_INT (4))), scratch); emit_move_insn (scratch, f0_addr); emit_move_insn (gen_rtx (MEM, SImode, gen_rtx (PLUS, Pmode, addr, - gen_rtx (CONST_INT, Pmode, 8))), + GEN_INT (8))), scratch); emit_move_insn (scratch, r1_addr); emit_move_insn (gen_rtx (MEM, SImode, gen_rtx (PLUS, Pmode, addr, - gen_rtx (CONST_INT, Pmode, 12))), + GEN_INT (12))), scratch); emit_move_insn (scratch, f1_addr); emit_move_insn (gen_rtx (MEM, SImode, gen_rtx (PLUS, Pmode, addr, - gen_rtx (CONST_INT, Pmode, 16))), + GEN_INT (16))), scratch); if (flag_check_memory_usage) { - emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, addr, - ptr_mode, GEN_INT (5 * GET_MODE_SIZE (SImode)), + emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, + addr, ptr_mode, + GEN_INT (5 * GET_MODE_SIZE (SImode)), + TYPE_MODE (sizetype), + GEN_INT (MEMORY_USE_RW), + TYPE_MODE (integer_type_node)); + + emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, + f0_addr, ptr_mode, + GEN_INT (GET_MODE_SIZE (DFmode)), + TYPE_MODE (sizetype), + GEN_INT (MEMORY_USE_RW), + TYPE_MODE (integer_type_node)); + emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, + f1_addr, ptr_mode, + GEN_INT (GET_MODE_SIZE (DFmode)), + TYPE_MODE (sizetype), + GEN_INT (MEMORY_USE_RW), + TYPE_MODE (integer_type_node)); + emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, + r0_addr, ptr_mode, + GEN_INT (GET_MODE_SIZE (SImode)), + TYPE_MODE (sizetype), + GEN_INT (MEMORY_USE_RW), + TYPE_MODE (integer_type_node)); + emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, + r1_addr, ptr_mode, + GEN_INT (GET_MODE_SIZE (SImode)), TYPE_MODE (sizetype), - GEN_INT (MEMORY_USE_RW), QImode); - - emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, f0_addr, - ptr_mode, GEN_INT (GET_MODE_SIZE (DFmode)), - TYPE_MODE (sizetype), GEN_INT (MEMORY_USE_RW), QImode); - emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, f1_addr, - ptr_mode, GEN_INT (GET_MODE_SIZE (DFmode)), - TYPE_MODE (sizetype), GEN_INT (MEMORY_USE_RW), QImode); - emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, r0_addr, - ptr_mode, GEN_INT (GET_MODE_SIZE (SImode)), - TYPE_MODE (sizetype), GEN_INT (MEMORY_USE_RW), QImode); - emit_library_call (chkr_set_right_libfunc, 1, VOIDmode, 3, r1_addr, - ptr_mode, GEN_INT (GET_MODE_SIZE (SImode)), - TYPE_MODE (sizetype), GEN_INT (MEMORY_USE_RW), QImode); + GEN_INT (MEMORY_USE_RW), + TYPE_MODE (integer_type_node)); } /* Return the address of the va_list constructor, but don't put it in a diff --git a/gcc/config/clipper/clipper.md b/gcc/config/clipper/clipper.md index 6790240184c..87f30fa5d0a 100644 --- a/gcc/config/clipper/clipper.md +++ b/gcc/config/clipper/clipper.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Clipper Version -;; Copyright (C) 1987, 1988, 1991, 1993, 1994 Free Software Foundation, Inc. +;; Copyright (C) 1987, 88, 91, 93, 94, 1997 Free Software Foundation, Inc. ;; Contributed by Holger Teutsch (holger@hotbso.rhein-main.de) ;; This file is part of GNU CC. @@ -340,12 +340,10 @@ abort (); yoperands[0] = operands[0]; - yoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + yoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); output_asm_insn (\"loadi %1,%0\", yoperands); - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); + xoperands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); output_asm_insn (\"loadi %1,%0\", xoperands); return \"\"; } @@ -532,8 +530,8 @@ operands[6] = addr0; operands[7] = addr1; - operands[0] = gen_rtx (MEM, BLKmode, addr0); - operands[1] = gen_rtx (MEM, BLKmode, addr1); + operands[0] = change_address (operands[0], VOIDmode, addr0); + operands[1] = change_address (operands[1], VOIDmode, addr1); if (GET_CODE (operands[2]) != CONST_INT) operands[2] = force_reg (SImode, operands[2]); @@ -735,7 +733,7 @@ val = -val; xops[0] = operands[0]; - xops[1] = gen_rtx (CONST_INT, VOIDmode, val); + xops[1] = GEN_INT (val); if (val >= 16) output_asm_insn (\"subi %1,%0\", xops); diff --git a/gcc/config/convex/convex.h b/gcc/config/convex/convex.h index 42aec68d6fe..893d83aee28 100644 --- a/gcc/config/convex/convex.h +++ b/gcc/config/convex/convex.h @@ -811,7 +811,7 @@ enum reg_class { as the "next arg register" to be passed to gen_call. */ #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ - ((MODE) == VOIDmode ? gen_rtx (CONST_INT, VOIDmode, (CUM)) : 0) + ((MODE) == VOIDmode ? GEN_INT ((CUM)) : 0) /* This macro generates the assembly code for function entry. FILE is a stdio stream to output the code to. diff --git a/gcc/config/dsp16xx/dsp16xx.c b/gcc/config/dsp16xx/dsp16xx.c index 90b316d5a1c..dc9763ee32d 100644 --- a/gcc/config/dsp16xx/dsp16xx.c +++ b/gcc/config/dsp16xx/dsp16xx.c @@ -1,5 +1,5 @@ /* Subroutines for assembler code output on the DSP1610. - Copyright (C) 1994, 1995 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1997 Free Software Foundation, Inc. Contributed by Michael Collison (collison@world.std.com). This file is part of GNU CC. @@ -20,8 +20,8 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* Some output-actions in dsp1600.md need these. */ -#include <stdio.h> #include "config.h" +#include <stdio.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -1705,7 +1705,7 @@ rtx *operands; REAL_VALUE_FROM_CONST_DOUBLE (d, src); REAL_VALUE_TO_TARGET_SINGLE (d, value); - operands[1] = gen_rtx (CONST_INT, VOIDmode, value); + operands[1] = GEN_INT (value); output_asm_insn ("%u0=%U1\n\t%w0=%H1", operands); #else fatal ("inline float constants not supported on this host"); @@ -1783,7 +1783,7 @@ enum machine_mode mode; emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (shift_op, mode, first_shift_emitted ? operands[0] : operands[1], - gen_rtx (CONST_INT, VOIDmode, 16)))); + GEN_INT (16)))); first_shift_emitted = 1; } else if (shift_amount/8) @@ -1794,7 +1794,7 @@ enum machine_mode mode; emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (shift_op, mode, first_shift_emitted ? operands[0] : operands[1], - gen_rtx (CONST_INT, VOIDmode, 8)))); + GEN_INT (8)))); first_shift_emitted = 1; } else if (shift_amount/4) @@ -1805,7 +1805,7 @@ enum machine_mode mode; emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (shift_op, mode, first_shift_emitted ? operands[0] : operands[1], - gen_rtx (CONST_INT, VOIDmode, 4)))); + GEN_INT (4)))); first_shift_emitted = 1; } else if (shift_amount/1) @@ -1816,7 +1816,7 @@ enum machine_mode mode; emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (shift_op, mode, first_shift_emitted ? operands[0] : operands[1], - gen_rtx (CONST_INT, VOIDmode, 1)))); + GEN_INT (1)))); first_shift_emitted = 1; } } diff --git a/gcc/config/fx80/fx80.md b/gcc/config/fx80/fx80.md index 6862767d764..cec863bfd6f 100644 --- a/gcc/config/fx80/fx80.md +++ b/gcc/config/fx80/fx80.md @@ -244,7 +244,7 @@ && (unsigned) INTVAL (operands[1]) < 8" "* { - operands[1] = gen_rtx (CONST_INT, VOIDmode, 7 - INTVAL (operands[1])); + operands[1] = GEN_INT (7 - INTVAL (operands[1])); return output_btst (operands, operands[1], operands[0], insn, 7); }") @@ -260,12 +260,10 @@ { operands[0] = adj_offsettable_operand (operands[0], INTVAL (operands[1]) / 8); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - 7 - INTVAL (operands[1]) % 8); + operands[1] = GEN_INT (7 - INTVAL (operands[1]) % 8); return output_btst (operands, operands[1], operands[0], insn, 7); } - operands[1] = gen_rtx (CONST_INT, VOIDmode, - 31 - INTVAL (operands[1])); + operands[1] = GEN_INT (31 - INTVAL (operands[1])); return output_btst (operands, operands[1], operands[0], insn, 31); }") @@ -951,8 +949,7 @@ if (INTVAL (operands[2]) < 0 && INTVAL (operands[2]) >= -8) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - - INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return (ADDRESS_REG_P (operands[0]) ? \"subq%.w %2,%0\" : \"subq%.l %2,%0\"); @@ -1343,8 +1340,7 @@ { if (GET_CODE (operands[0]) != REG) operands[0] = adj_offsettable_operand (operands[0], 2); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* Do not delete a following tstl %0 insn; that would be incorrect. */ CC_STATUS_INIT; if (operands[2] == const0_rtx) @@ -1396,11 +1392,11 @@ || offsettable_memref_p (operands[0]))) { if (DATA_REG_P (operands[0])) - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval); + operands[1] = GEN_INT (logval); else { operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8)); - operands[1] = gen_rtx (CONST_INT, VOIDmode, logval % 8); + operands[1] = GEN_INT (logval % 8); } return \"bset %1,%0\"; } @@ -1901,8 +1897,7 @@ { int width = GET_CODE (operands[0]) == REG ? 31 : 7; return output_btst (operands, - gen_rtx (CONST_INT, VOIDmode, - width - INTVAL (operands[2])), + GEN_INT (width - INTVAL (operands[2])), operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will @@ -1928,8 +1923,7 @@ { int width = GET_CODE (operands[0]) == REG ? 31 : 7; return output_btst (operands, - gen_rtx (CONST_INT, VOIDmode, - width - INTVAL (operands[2])), + GEN_INT (width - INTVAL (operands[2])), operands[0], insn, 1000); /* Pass 1000 as SIGNPOS argument so that btst will @@ -2300,7 +2294,7 @@ (HImode, gen_rtx (PLUS, Pmode, gen_rtx (MULT, Pmode, index_diff, - gen_rtx (CONST_INT, VOIDmode, 2)), + GEN_INT (2)), gen_rtx (LABEL_REF, VOIDmode, operands[3]))); /* Emit the last few insns. */ emit_insn (gen_casesi_2 (gen_reg_rtx (HImode), table_elt_addr, operands[3])); @@ -2404,11 +2398,11 @@ output_asm_insn (\"sub%.l a0,a0\;jbsr %0\", operands); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, size/4); + xoperands[1] = GEN_INT (size/4); output_asm_insn (\"mov%.l sp,a0\;pea %a1\", xoperands); output_asm_insn (\"jbsr %0\", operands); size = size + 4; - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, size); + xoperands[1] = GEN_INT (size); if (size <= 8) output_asm_insn (\"addq%.l %1,sp\", xoperands); else if (size < 0x8000) @@ -2435,11 +2429,11 @@ output_asm_insn(\"sub%.l a0,a0\;jbsr %1\", operands); else { - xoperands[2] = gen_rtx (CONST_INT, VOIDmode, size/4); + xoperands[2] = GEN_INT (size/4); output_asm_insn (\"mov%.l sp,a0\;pea %a2\", xoperands); output_asm_insn (\"jbsr %1\", operands); size = size + 4; - xoperands[2] = gen_rtx (CONST_INT, VOIDmode, size); + xoperands[2] = GEN_INT (size); if (size <= 8) output_asm_insn (\"addq%.l %2,sp\", xoperands); else if (size < 0x8000) diff --git a/gcc/config/gmicro/gmicro.c b/gcc/config/gmicro/gmicro.c index 866c6c4a672..0029ccc07bd 100644 --- a/gcc/config/gmicro/gmicro.c +++ b/gcc/config/gmicro/gmicro.c @@ -2,7 +2,7 @@ Ported by Masanobu Yuhara, Fujitsu Laboratories LTD. (yuhara@flab.fujitsu.co.jp) - Copyright (C) 1990, 1991 Free Software Foundation, Inc. + Copyright (C) 1990, 1991, 1997 Free Software Foundation, Inc. This file is part of GNU CC. @@ -25,8 +25,8 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include <stdio.h> #include "config.h" +#include <stdio.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -635,11 +635,9 @@ output_move_const_double (operands) { rtx xoperands[2]; xoperands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); + xoperands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); output_asm_insn ("mov.w %1,%0", xoperands); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); return "mov.w %1,%0"; } else @@ -760,7 +758,7 @@ add_imm_word (imm, dest, immp) if (imm < 0) { - *immp = gen_rtx (CONST_INT, VOIDmode, -imm); + *immp = GEN_INT (-imm); return sub_imm_word (-imm, dest); } @@ -795,7 +793,7 @@ sub_imm_word (imm, dest, immp) if (imm < 0 && imm != 0x80000000) { - *immp = gen_rtx (CONST_INT, VOIDmode, -imm); + *immp = GEN_INT (-imm); return add_imm_word (-imm, dest); } diff --git a/gcc/config/gmicro/gmicro.md b/gcc/config/gmicro/gmicro.md index 0fc44875b6d..35384ce044d 100644 --- a/gcc/config/gmicro/gmicro.md +++ b/gcc/config/gmicro/gmicro.md @@ -271,7 +271,7 @@ "* { register int log = exact_log2 (INTVAL (operands[1])); - operands[1] = gen_rtx (CONST_INT, VOIDmode, log); + operands[1] = GEN_INT (log); return \"btst %1,%0.b\"; }") @@ -746,8 +746,7 @@ return \"mov.w @(12,r0),@(12,r1)\"; } - operands[2] = - gen_rtx (CONST_INT, VOIDmode, op2const); + operands[2] = GEN_INT (op2const); output_asm_insn (\"mov.w %2,r2\", operands); return \"smov/n/f.w\"; } @@ -833,7 +832,7 @@ } else { - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, wlen); + xoperands[0] = GEN_INT (wlen); output_asm_insn (\"mov.w %0,r2\", xoperands); output_asm_insn (\"smov/n/f.w\", operands); } @@ -1517,8 +1516,7 @@ { if (GET_CODE (operands[0]) != REG) operands[0] = adj_offsettable_operand (operands[0], 2); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); /* Do not delete a following tstl %0 insn; that would be incorrect. */ CC_STATUS_INIT; return \"and.h %2,%0\"; @@ -1595,16 +1593,16 @@ { if (logval < 7) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, 7 - logval); + operands[1] = GEN_INT (7 - logval); return \"bset.b %1,%0\"; } - operands[1] = gen_rtx (CONST_INT, VOIDmode, 31 - logval); + operands[1] = GEN_INT (31 - logval); return \"bset.w %1,%0\"; } else { operands[0] = adj_offsettable_operand (operands[0], 3 - (logval / 8)); - operands[1] = gen_rtx (CONST_INT, VOIDmode, 7 - (logval % 8)); + operands[1] = GEN_INT (7 - (logval % 8)); } return \"bset.b %1,%0\"; } @@ -2255,7 +2253,7 @@ output_asm_insn (\"mov.w %1,%0\", operands); if (INTVAL (operands[3]) != 0) output_asm_insn (\"shl.w %3,%0\", operands); - operands[2] = gen_rtx (CONST_INT, VOIDmode, -(32 - INTVAL (operands[2]))); + operands[2] = GEN_INT (-(32 - INTVAL (operands[2]))); return \"sha.w %3,%0\"; }") @@ -2272,7 +2270,7 @@ output_asm_insn (\"mov.w %1,%0\", operands); if (INTVAL (operands[3]) != 0) output_asm_insn (\"shl.w %3,%0\", operands); - operands[2] = gen_rtx (CONST_INT, VOIDmode, -(32 - INTVAL (operands[2]))); + operands[2] = GEN_INT (-(32 - INTVAL (operands[2]))); return \"shl.w %3,%0\"; }") diff --git a/gcc/config/i370/i370.h b/gcc/config/i370/i370.h index 8f7658f7cb9..b0664d75304 100644 --- a/gcc/config/i370/i370.h +++ b/gcc/config/i370/i370.h @@ -575,13 +575,12 @@ enum reg_class #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x05E0)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x5800 | \ - STATIC_CHAIN_REGNUM << 4)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00A)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x58F0)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xE00E)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x07FF)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x05E0)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x5800 STATIC_CHAIN_REGNUM << 4)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00A)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x58F0)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0xE00E)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x07FF)); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ diff --git a/gcc/config/i370/i370.md b/gcc/config/i370/i370.md index e12d2f62026..6d893d64388 100644 --- a/gcc/config/i370/i370.md +++ b/gcc/config/i370/i370.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler -- System/370 version. -;; Copyright (C) 1989, 1993, 1994, 1995 Free Software Foundation, Inc. +;; Copyright (C) 1989, 93, 94, 95, 1997 Free Software Foundation, Inc. ;; Contributed by Jan Stein (jan@cd.chalmers.se). ;; Modified for MVS C/370 by Dave Pitts (dpitts@nyx.cs.du.edu) @@ -1210,36 +1210,30 @@ check_label_emit (); op0 = XEXP (operands[0], 0); if (GET_CODE (op0) == REG - || (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 0)) == REG - && GET_CODE (XEXP (op0, 1)) == CONST_INT - && (unsigned) INTVAL (XEXP (op0, 1)) < 4096)) - { - op0 = operands[0]; - } + || (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 0)) == REG + && GET_CODE (XEXP (op0, 1)) == CONST_INT + && (unsigned) INTVAL (XEXP (op0, 1)) < 4096)) + op0 = operands[0]; else - { - op0 = gen_rtx (MEM, BLKmode, copy_to_mode_reg (SImode, op0)); - } + op0 = change_address (operands[0], VOIDmode, + copy_to_mode_reg (SImode, op0)); op1 = XEXP (operands[1], 0); if (GET_CODE (op1) == REG || (GET_CODE (op1) == PLUS && GET_CODE (XEXP (op1, 0)) == REG && GET_CODE (XEXP (op1, 1)) == CONST_INT && (unsigned) INTVAL (XEXP (op1, 1)) < 4096)) - { - op1 = operands[1]; - } + op1 = operands[1]; else - { - op1 = gen_rtx (MEM, BLKmode, copy_to_mode_reg (SImode, op1)); - } + op1 = change_address (operands[1], VOIDmode, + copy_to_mode_reg (SImode, op1)); if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 256) - { - emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (2, - gen_rtx (SET, VOIDmode, op0, op1), - gen_rtx (USE, VOIDmode, operands[2])))); - } + emit_insn (gen_rtx (PARALLEL, VOIDmode, + gen_rtvec (2, + gen_rtx (SET, VOIDmode, op0, op1), + gen_rtx (USE, VOIDmode, operands[2])))); + else { rtx reg1 = gen_reg_rtx (DImode); @@ -1248,13 +1242,14 @@ check_label_emit (); emit_insn (gen_rtx (SET, VOIDmode, subreg, operands[2])); emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (SUBREG, SImode, reg2, 1), - subreg)); - emit_insn (gen_rtx (PARALLEL, VOIDmode, gen_rtvec (5, - gen_rtx (SET, VOIDmode, op0, op1), - gen_rtx (USE, VOIDmode, reg1), - gen_rtx (USE, VOIDmode, reg2), - gen_rtx (CLOBBER, VOIDmode, reg1), - gen_rtx (CLOBBER, VOIDmode, reg2)))); + subreg)); + emit_insn (gen_rtx (PARALLEL, VOIDmode, + gen_rtvec (5, + gen_rtx (SET, VOIDmode, op0, op1), + gen_rtx (USE, VOIDmode, reg1), + gen_rtx (USE, VOIDmode, reg2), + gen_rtx (CLOBBER, VOIDmode, reg1), + gen_rtx (CLOBBER, VOIDmode, reg2)))); } DONE; }") @@ -1310,7 +1305,7 @@ check_label_emit (); operand_subword (operands[0], 0, 1, DImode), operands[1])); emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (ASHIFTRT, DImode, operands[0], - gen_rtx (CONST_INT, SImode, 32)))); + GEN_INT (32)))); } else { @@ -1318,13 +1313,13 @@ check_label_emit (); { emit_insn (gen_rtx (SET, VOIDmode, operand_subword (operands[0], 0, 1, DImode), - gen_rtx (CONST_INT, SImode, -1))); + GEN_INT (-1))); } else { emit_insn (gen_rtx (SET, VOIDmode, operand_subword (operands[0], 0, 1, DImode), - gen_rtx (CONST_INT, SImode, 0))); + GEN_INT (0))); } emit_insn (gen_rtx (SET, VOIDmode, gen_lowpart (SImode, operands[0]), operands[1])); @@ -1443,7 +1438,7 @@ check_label_emit (); operand_subword (operands[0], 0, 1, DImode), operands[1])); emit_insn (gen_rtx (SET, VOIDmode, operands[0], gen_rtx (LSHIFTRT, DImode, operands[0], - gen_rtx (CONST_INT, SImode, 32)))); + GEN_INT (32)))); DONE; }") @@ -1649,7 +1644,7 @@ check_label_emit (); gen_rtx (USE, VOIDmode, gen_rtx (LABEL_REF, VOIDmode, label))))); emit_insn (gen_rtx (SET, VOIDmode, op0_high, gen_rtx (PLUS, SImode, op0_high, - gen_rtx (CONST_INT, SImode, 1)))); + GEN_INT (1)))); emit_label (label); DONE; }") @@ -1891,7 +1886,7 @@ check_label_emit (); gen_rtx (LABEL_REF, VOIDmode, label))))); emit_insn (gen_rtx (SET, VOIDmode, op0_high, gen_rtx (MINUS, SImode, op0_high, - gen_rtx (CONST_INT, SImode, 1)))); + GEN_INT (1)))); emit_label (label); DONE; }") @@ -2266,7 +2261,7 @@ check_label_emit (); emit_jump_insn (gen_beq (label1)); emit_insn (gen_rtx (SET, VOIDmode, dr, gen_rtx (LSHIFTRT, DImode, dr, - gen_rtx (CONST_INT, SImode, 32)))); + GEN_INT (32)))); emit_insn (gen_rtx (SET, VOIDmode, dr, gen_rtx (DIV, SImode, dr, sr))); emit_jump_insn (gen_jump (label3)); @@ -2391,7 +2386,7 @@ check_label_emit (); { emit_insn (gen_rtx (SET, VOIDmode, dr, gen_rtx (LSHIFTRT, DImode, dr, - gen_rtx (CONST_INT, SImode, 32)))); + GEN_INT (32)))); emit_insn (gen_rtx (SET, VOIDmode, dr, gen_rtx (MOD, SImode, dr, operands[2]))); } @@ -2425,7 +2420,7 @@ check_label_emit (); emit_jump_insn (gen_beq (label1)); emit_insn (gen_rtx (SET, VOIDmode, dr, gen_rtx (LSHIFTRT, DImode, dr, - gen_rtx (CONST_INT, SImode, 32)))); + GEN_INT (32)))); emit_insn (gen_rtx (SET, VOIDmode, dr, gen_rtx (MOD, SImode, dr, sr))); emit_jump_insn (gen_jump (label3)); emit_label (label1); diff --git a/gcc/config/i860/i860.c b/gcc/config/i860/i860.c index dce13404783..cedbeb1885a 100644 --- a/gcc/config/i860/i860.c +++ b/gcc/config/i860/i860.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Intel 860 - Copyright (C) 1989, 1991 Free Software Foundation, Inc. + Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc. Derived from sparc.c. Written by Richard Stallman (rms@ai.mit.edu). @@ -26,6 +26,7 @@ Boston, MA 02111-1307, USA. */ #include "config.h" +#include <stdio.h> #include "flags.h" #include "rtl.h" #include "regs.h" @@ -38,8 +39,6 @@ Boston, MA 02111-1307, USA. */ #include "recog.h" #include "insn-attr.h" -#include <stdio.h> - static rtx find_addr_reg (); #ifndef I860_REG_PREFIX @@ -1115,7 +1114,7 @@ output_size_for_block_move (size, reg, align) else { xoperands[1] - = gen_rtx (CONST_INT, VOIDmode, INTVAL (size) - INTVAL (align)); + = GEN_INT (INTVAL (size) - INTVAL (align)); cc_status.flags &= ~ CC_KNOW_HI_R31; output_asm_insn ("mov %1,%0", xoperands); } @@ -1154,7 +1153,7 @@ output_block_move (operands) if (align > 4) { align = 4; - alignrtx = gen_rtx (CONST_INT, VOIDmode, 4); + alignrtx = GEN_INT (4); } /* Recognize special cases of block moves. These occur @@ -1239,7 +1238,7 @@ output_block_move (operands) /* Generate number for unique label. */ - xoperands[3] = gen_rtx (CONST_INT, VOIDmode, movstrsi_label++); + xoperands[3] = GEN_INT (movstrsi_label++); /* Calculate the size of the chunks we will be trying to move first. */ @@ -1254,7 +1253,7 @@ output_block_move (operands) /* Copy the increment (negative) to a register for bla insn. */ - xoperands[4] = gen_rtx (CONST_INT, VOIDmode, - chunk_size); + xoperands[4] = GEN_INT (- chunk_size); xoperands[5] = operands[5]; output_asm_insn ("adds %4,%?r0,%5", xoperands); diff --git a/gcc/config/i860/i860.h b/gcc/config/i860/i860.h index 8486d8d656d..41fde065f28 100644 --- a/gcc/config/i860/i860.h +++ b/gcc/config/i860/i860.h @@ -618,11 +618,11 @@ struct cumulative_args { int ints, floats; }; or #BOTTOM_OF_STATIC,r29,r29 */ #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xec1f0000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xe7ff0000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xec1d0000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4000f800)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0xe7bd0000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0xec1f0000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0xe7ff0000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0xec1d0000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x4000f800)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0xe7bd0000)); \ } /* Length in units of the trampoline for entering a nested function. */ diff --git a/gcc/config/i860/i860.md b/gcc/config/i860/i860.md index a3df7bc4584..48e0c35a396 100644 --- a/gcc/config/i860/i860.md +++ b/gcc/config/i860/i860.md @@ -1,5 +1,5 @@ ;;- Machine description for Intel 860 chip for GNU C compiler -;; Copyright (C) 1989, 1990 Free Software Foundation, Inc. +;; Copyright (C) 1989, 1990, 1997 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -88,8 +88,7 @@ int pos = 8 - width - INTVAL (operands[1]); CC_STATUS_PARTIAL_INIT; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - ~((-1) << width) << pos); + operands[2] = GEN_INT (~((-1) << width) << pos); return \"and %2,%0,%?r0\"; }") @@ -136,7 +135,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"adds %1,%0,%?r0\"; } }") @@ -153,7 +152,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[0] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[0])); + operands[0] = GEN_INT (- INTVAL (operands[0])); return \"adds %0,%1,%?r0\"; } }") @@ -171,7 +170,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[0] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[0])); + operands[0] = GEN_INT (- INTVAL (operands[0])); return \"adds %0,%1,%?r0\"; } }") @@ -189,7 +188,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"adds %1,%0,%?r0\"; } }") @@ -228,7 +227,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[1] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1])); + operands[1] = GEN_INT (- INTVAL (operands[1])); return \"addu %1,%0,%?r0\"; } } @@ -250,7 +249,7 @@ else { cc_status.flags |= CC_REVERSED; - operands[0] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[0])); + operands[0] = GEN_INT (- INTVAL (operands[0])); return \"addu %0,%1,%?r0\"; } } @@ -1004,23 +1003,26 @@ ;; that anything generated as this insn will be recognized as one ;; and that it won't successfully combine with anything. (define_expand "movstrsi" - [(parallel [(set (mem:BLK (match_operand:BLK 0 "general_operand" "")) - (mem:BLK (match_operand:BLK 1 "general_operand" ""))) + [(parallel [(set (match_operand:BLK 0 "general_operand" "") + (match_operand:BLK 1 "general_operand" "")) (use (match_operand:SI 2 "nonmemory_operand" "")) (use (match_operand:SI 3 "immediate_operand" "")) (clobber (match_dup 4)) (clobber (match_dup 5)) (clobber (match_dup 6)) - (clobber (match_dup 0)) - (clobber (match_dup 1))])] + (clobber (match_dup 7)) + (clobber (match_dup 8))])] "" " { - operands[0] = copy_to_mode_reg (SImode, XEXP (operands[0], 0)); - operands[1] = copy_to_mode_reg (SImode, XEXP (operands[1], 0)); operands[4] = gen_reg_rtx (SImode); operands[5] = gen_reg_rtx (SImode); operands[6] = gen_reg_rtx (SImode); + operands[7] = copy_to_mode_reg (SImode, XEXP (operands[0], 0)); + operands[8] = copy_to_mode_reg (SImode, XEXP (operands[1], 0)); + + operands[0] = change_address (operands[0], VOIDmode, operands[7]); + operands[1] = change_address (operands[1], VOIDmode, operands[8]); }") (define_insn "" @@ -1525,8 +1527,7 @@ "* { CC_STATUS_PARTIAL_INIT; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[2]) << INTVAL (operands[1]))); + operands[2] = GEN_INT ((INTVAL (operands[2]) << INTVAL (operands[1]))); return \"and %2,%0,%?r0\"; }") @@ -1541,8 +1542,7 @@ "* { CC_STATUS_PARTIAL_INIT; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[2]) << INTVAL (operands[1]))); + operands[2] = GEN_INT ((INTVAL (operands[2]) << INTVAL (operands[1]))); return \"and %2,%0,%?r0\"; }") @@ -1679,7 +1679,7 @@ CC_STATUS_PARTIAL_INIT; if (REG_P (operands[2])) return \"subu %1,%2,%0\"; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2])); + operands[2] = GEN_INT (- INTVAL (operands[2])); return \"addu %2,%1,%0\"; }") @@ -1766,16 +1766,14 @@ return \"and %2,%1,%0\"; if ((INTVAL (operands[2]) & 0xffff) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); return \"andh %2,%1,%0\"; } xop[0] = operands[0]; xop[1] = operands[1]; - xop[2] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (operands[2]) & 0xffff); + xop[2] = GEN_INT (~INTVAL (operands[2]) & 0xffff); output_asm_insn (\"andnot %2,%1,%0\", xop); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - ~(unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT (~(unsigned) INTVAL (operands[2]) >> 16); return \"andnoth %2,%0,%0\"; }") @@ -1793,16 +1791,14 @@ return \"andnot %1,%2,%0\"; if ((INTVAL (operands[1]) & 0xffff) == 0) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[1]) >> 16); + operands[1] = GEN_INT ((unsigned) INTVAL (operands[1]) >> 16); return \"andnoth %1,%2,%0\"; } xop[0] = operands[0]; - xop[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) & 0xffff)); + xop[1] = GEN_INT ((INTVAL (operands[1]) & 0xffff)); xop[2] = operands[2]; output_asm_insn (\"andnot %1,%2,%0\", xop); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[1]) >> 16); + operands[1] = GEN_INT ((unsigned) INTVAL (operands[1]) >> 16); return \"andnoth %1,%0,%0\"; }") @@ -1820,16 +1816,14 @@ return \"or %2,%1,%0\"; if ((INTVAL (operands[2]) & 0xffff) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); return \"orh %2,%1,%0\"; } xop[0] = operands[0]; xop[1] = operands[1]; - xop[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) & 0xffff)); + xop[2] = GEN_INT ((INTVAL (operands[2]) & 0xffff)); output_asm_insn (\"or %2,%1,%0\", xop); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); return \"orh %2,%0,%0\"; }") @@ -1847,16 +1841,14 @@ return \"xor %2,%1,%0\"; if ((INTVAL (operands[2]) & 0xffff) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); return \"xorh %2,%1,%0\"; } xop[0] = operands[0]; xop[1] = operands[1]; - xop[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) & 0xffff)); + xop[2] = GEN_INT ((INTVAL (operands[2]) & 0xffff)); output_asm_insn (\"xor %2,%1,%0\", xop); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (unsigned) INTVAL (operands[2]) >> 16); + operands[2] = GEN_INT ((unsigned) INTVAL (operands[2]) >> 16); return \"xorh %2,%0,%0\"; }") diff --git a/gcc/config/i960/i960.c b/gcc/config/i960/i960.c index 70e5f208ecc..32903afbaf0 100644 --- a/gcc/config/i960/i960.c +++ b/gcc/config/i960/i960.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on intel 80960. - Copyright (C) 1992, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1992, 1995, 1996, 1997 Free Software Foundation, Inc. Contributed by Steven McGeady, Intel Corp. Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support. @@ -21,9 +21,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include <stdio.h> - #include "config.h" +#include <stdio.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -36,7 +35,6 @@ Boston, MA 02111-1307, USA. */ #include "flags.h" #include "tree.h" #include "insn-codes.h" -#include "assert.h" #include "expr.h" #include "except.h" #include "function.h" @@ -825,7 +823,7 @@ i960_output_ldconst (dst, src) output_asm_insn ("# ldconst %1,%0",operands); operands[0] = gen_rtx (REG, SImode, REGNO (dst)); - operands[1] = gen_rtx (CONST_INT, VOIDmode, value); + operands[1] = GEN_INT (value); output_asm_insn (i960_output_ldconst (operands[0], operands[1]), operands); return ""; @@ -896,7 +894,7 @@ i960_output_ldconst (dst, src) { if (i960_last_insn_type == I_TYPE_REG && TARGET_C_SERIES) return "lda %1,%0"; - operands[1] = gen_rtx (CONST_INT, VOIDmode, rsrc1 - 31); + operands[1] = GEN_INT (rsrc1 - 31); output_asm_insn ("addo\t31,%1,%0\t# ldconst %3,%0", operands); return ""; } @@ -907,7 +905,7 @@ i960_output_ldconst (dst, src) if (rsrc1 >= -31) { /* return 'sub -(%1),0,%0' */ - operands[1] = gen_rtx (CONST_INT, VOIDmode, - rsrc1); + operands[1] = GEN_INT (- rsrc1); output_asm_insn ("subo\t%1,0,%0\t# ldconst %3,%0", operands); return ""; } @@ -915,7 +913,7 @@ i960_output_ldconst (dst, src) /* ldconst -32 -> not 31,X */ if (rsrc1 == -32) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, ~rsrc1); + operands[1] = GEN_INT (~rsrc1); output_asm_insn ("not\t%1,%0 # ldconst %3,%0", operands); return ""; } @@ -924,7 +922,7 @@ i960_output_ldconst (dst, src) /* If const is a single bit. */ if (bitpos (rsrc1) >= 0) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, bitpos (rsrc1)); + operands[1] = GEN_INT (bitpos (rsrc1)); output_asm_insn ("setbit\t%1,0,%0\t# ldconst %3,%0", operands); return ""; } @@ -937,8 +935,8 @@ i960_output_ldconst (dst, src) if (bitstr (rsrc1, &s, &e) < 6) { rsrc2 = ((unsigned int) rsrc1) >> s; - operands[1] = gen_rtx (CONST_INT, VOIDmode, rsrc2); - operands[2] = gen_rtx (CONST_INT, VOIDmode, s); + operands[1] = GEN_INT (rsrc2); + operands[2] = GEN_INT (s); output_asm_insn ("shlo\t%2,%1,%0\t# ldconst %3,%0", operands); return ""; } @@ -2242,7 +2240,8 @@ i960_arg_size_and_align (mode, type, size_out, align_out) else if (mode == VOIDmode) { /* End of parm list. */ - assert (type != 0 && TYPE_MODE (type) == VOIDmode); + if (type == 0 || TYPE_MODE (type) != VOIDmode) + abort (); size = 1; } else diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h index 556c755ea72..ed07e9a485f 100644 --- a/gcc/config/i960/i960.h +++ b/gcc/config/i960/i960.h @@ -1473,11 +1473,11 @@ extern struct rtx_def *gen_compare_reg (); #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x8C203000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x8C183000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x84212000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x8C203000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x8C183000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x84212000)); \ } /* Length in units of the trampoline for entering a nested function. */ diff --git a/gcc/config/i960/i960.md b/gcc/config/i960/i960.md index 32acd924ed1..55b6ebf511a 100644 --- a/gcc/config/i960/i960.md +++ b/gcc/config/i960/i960.md @@ -1179,7 +1179,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_16 = gen_rtx (CONST_INT, VOIDmode, 16); + rtx shift_16 = GEN_INT (16); int op1_subreg_word = 0; if (GET_CODE (operand1) == SUBREG) @@ -1213,7 +1213,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op1_subreg_word = 0; if (GET_CODE (operand1) == SUBREG) @@ -1248,7 +1248,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op0_subreg_word = 0; int op1_subreg_word = 0; @@ -1292,7 +1292,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_16 = gen_rtx (CONST_INT, VOIDmode, 16); + rtx shift_16 = GEN_INT (16); int op1_subreg_word = 0; if (GET_CODE (operand1) == SUBREG) @@ -1331,7 +1331,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op1_subreg_word = 0; if (GET_CODE (operand1) == SUBREG) @@ -1366,7 +1366,7 @@ && GET_CODE (XEXP (operand1, 0)) == REG)) { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op0_subreg_word = 0; int op1_subreg_word = 0; @@ -1620,7 +1620,7 @@ ;; (match_operand:SI 2 "power2_operand" "nI")))] ;; "" ;; "*{ -;; operands[2] = gen_rtx(CONST_INT, VOIDmode,bitpos (INTVAL (operands[2]))); +;; operands[2] = GEN_INT (bitpos (INTVAL (operands[2]))); ;; return \"shrdi %2,%1,%0\"; ;; }" @@ -1682,8 +1682,7 @@ "" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - bitpos (~INTVAL (operands[2]))); + operands[2] = GEN_INT (bitpos (~INTVAL (operands[2]))); return \"clrbit %2,%1,%0\"; }") @@ -1734,8 +1733,7 @@ "" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - bitpos (INTVAL (operands[2]))); + operands[2] = GEN_INT (bitpos (INTVAL (operands[2]))); return \"setbit %2,%1,%0\"; }") @@ -1786,8 +1784,7 @@ "" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - bitpos (INTVAL (operands[2]))); + operands[2] = GEN_INT (bitpos (INTVAL (operands[2]))); return \"notbit %2,%1,%0\"; }") diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md index 1976356e9b3..314f3ae4981 100644 --- a/gcc/config/m32r/m32r.md +++ b/gcc/config/m32r/m32r.md @@ -598,7 +598,7 @@ " { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op1_subword = 0; int op0_subword = 0; @@ -635,7 +635,7 @@ " { rtx temp = gen_reg_rtx (SImode); - rtx shift_24 = gen_rtx (CONST_INT, VOIDmode, 24); + rtx shift_24 = GEN_INT (24); int op1_subword = 0; if (GET_CODE (operand1) == SUBREG) @@ -665,7 +665,7 @@ " { rtx temp = gen_reg_rtx (SImode); - rtx shift_16 = gen_rtx (CONST_INT, VOIDmode, 16); + rtx shift_16 = GEN_INT (16); int op1_subword = 0; if (GET_CODE (operand1) == SUBREG) diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 52b3fd06ac8..3a9f3310eec 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -4519,7 +4519,7 @@ return \"add%.l %1,%1\;addx%.l %0,%0\;add%.l %1,%1\;addx%.l %0,%0\;add%.l %1,%1\;addx%.l %0,%0\"; else /* 32 < INTVAL (operands[2]) <= 63 */ { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32); + operands[2] = GEN_INT (INTVAL (operands[2]) - 32); output_asm_insn (INTVAL (operands[2]) <= 8 ? \"asl%.l %2,%1\" : \"moveq %2,%0\;asl%.l %0,%1\", operands); return \"mov%.l %1,%0\;moveq %#0,%1\"; @@ -4726,7 +4726,7 @@ return \"asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\"; else /* 32 < INTVAL (operands[2]) <= 63 */ { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32); + operands[2] = GEN_INT (INTVAL (operands[2]) - 32); output_asm_insn (INTVAL (operands[2]) <= 8 ? \"asr%.l %2,%0\" : \"moveq %2,%1\;asr%.l %1,%0\", operands); output_asm_insn (\"mov%.l %0,%1\;smi %0\", operands); @@ -4894,7 +4894,7 @@ return \"lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\"; else /* 32 < INTVAL (operands[2]) <= 63 */ { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) - 32); + operands[2] = GEN_INT (INTVAL (operands[2]) - 32); output_asm_insn (INTVAL (operands[2]) <= 8 ? \"lsr%.l %2,%0\" : \"moveq %2,%1\;lsr%.l %1,%0\", operands); return \"mov%.l %0,%1\;moveq %#0,%0\"; diff --git a/gcc/config/m68k/m68kv4.h b/gcc/config/m68k/m68kv4.h index a40d919990d..16cc1c904de 100644 --- a/gcc/config/m68k/m68kv4.h +++ b/gcc/config/m68k/m68kv4.h @@ -321,11 +321,11 @@ int switch_table_difference_label_flag; #undef TRAMPOLINE_TEMPLATE #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x227a)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 8)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x2f3a)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 8)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x4e75)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x227a)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x2f3a)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (8)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x4e75)); \ ASM_OUTPUT_INT (FILE, const0_rtx); \ ASM_OUTPUT_INT (FILE, const0_rtx); \ } diff --git a/gcc/config/m88k/m88k.c b/gcc/config/m88k/m88k.c index 67df28e5940..b1250e5e61b 100644 --- a/gcc/config/m88k/m88k.c +++ b/gcc/config/m88k/m88k.c @@ -596,8 +596,7 @@ block_move_loop (dest, dest_mem, src, src_mem, size, align) GET_MODE_NAME (mode), MOVSTR_LOOP, units * align); entry_name = get_identifier (entry); - offset_rtx = gen_rtx (CONST_INT, VOIDmode, - MOVSTR_LOOP + (1 - units) * align); + offset_rtx = GEN_INT (MOVSTR_LOOP + (1 - units) * align); value_rtx = gen_rtx (MEM, MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, gen_rtx (PLUS, Pmode, @@ -611,7 +610,7 @@ block_move_loop (dest, dest_mem, src, src_mem, size, align) (gen_rtx (SYMBOL_REF, Pmode, IDENTIFIER_POINTER (entry_name)), dest, src, offset_rtx, value_rtx, gen_rtx (REG, mode, ((units & 1) ? 4 : 5)), - gen_rtx (CONST_INT, VOIDmode, count))); + GEN_INT (count))); if (remainder) block_move_sequence (gen_rtx (REG, Pmode, 2), dest_mem, @@ -654,7 +653,7 @@ block_move_no_loop (dest, dest_mem, src, src_mem, size, align) GET_MODE_NAME (mode), most, size - remainder); entry_name = get_identifier (entry); - offset_rtx = gen_rtx (CONST_INT, VOIDmode, most - (size - remainder)); + offset_rtx = GEN_INT (most - (size - remainder)); value_rtx = gen_rtx (MEM, MEM_IN_STRUCT_P (src_mem) ? mode : BLKmode, gen_rtx (PLUS, Pmode, @@ -732,7 +731,7 @@ block_move_sequence (dest, dest_mem, src, src_mem, size, align, offset) srcp = gen_rtx (MEM, MEM_IN_STRUCT_P (src_mem) ? mode[next] : BLKmode, gen_rtx (PLUS, Pmode, src, - gen_rtx (CONST_INT, SImode, offset_ld))); + GEN_INT (offset_ld))); RTX_UNCHANGING_P (srcp) = RTX_UNCHANGING_P (src_mem); MEM_VOLATILE_P (srcp) = MEM_VOLATILE_P (src_mem); MEM_IN_STRUCT_P (srcp) = MEM_IN_STRUCT_P (src_mem); @@ -747,7 +746,7 @@ block_move_sequence (dest, dest_mem, src, src_mem, size, align, offset) dstp = gen_rtx (MEM, MEM_IN_STRUCT_P (dest_mem) ? mode[phase] : BLKmode, gen_rtx (PLUS, Pmode, dest, - gen_rtx (CONST_INT, SImode, offset_st))); + GEN_INT (offset_st))); RTX_UNCHANGING_P (dstp) = RTX_UNCHANGING_P (dest_mem); MEM_VOLATILE_P (dstp) = MEM_VOLATILE_P (dest_mem); MEM_IN_STRUCT_P (dstp) = MEM_IN_STRUCT_P (dest_mem); @@ -2102,7 +2101,7 @@ emit_add (dstreg, srcreg, amount) rtx srcreg; int amount; { - rtx incr = gen_rtx (CONST_INT, VOIDmode, abs (amount)); + rtx incr = GEN_INT (abs (amount)); if (! ADD_INTVAL (amount)) { rtx temp = gen_rtx (REG, SImode, TEMP_REGNUM); @@ -2229,7 +2228,7 @@ emit_ldst (store_p, regno, mode, offset) { /* offset is too large for immediate index must use register */ - rtx disp = gen_rtx (CONST_INT, VOIDmode, offset); + rtx disp = GEN_INT (offset); rtx temp = gen_rtx (REG, SImode, TEMP_REGNUM); rtx regi = gen_rtx (PLUS, SImode, stack_pointer_rtx, temp); emit_move_insn (temp, disp); @@ -2599,7 +2598,7 @@ m88k_builtin_saveregs (arglist) { fixed = (XINT (current_function_arg_offset_rtx, 0) + argadj) / UNITS_PER_WORD; - argsize = gen_rtx (CONST_INT, VOIDmode, fixed); + argsize = GEN_INT (fixed); } else { @@ -2728,7 +2727,7 @@ emit_bcnd (op, label) { if (SMALL_INTVAL (-value)) emit_insn (gen_addsi3 (zero, reg, - gen_rtx (CONST_INT, VOIDmode, -value))); + GEN_INT (-value))); else emit_insn (gen_xorsi3 (zero, reg, constant)); diff --git a/gcc/config/m88k/m88k.md b/gcc/config/m88k/m88k.md index bf5124b2244..54ec6486773 100644 --- a/gcc/config/m88k/m88k.md +++ b/gcc/config/m88k/m88k.md @@ -367,8 +367,7 @@ "mak_mask_p (INTVAL (operands[3]) >> INTVAL (operands[2]))" "* { - operands[4] = gen_rtx (CONST_INT, SImode, - exact_log2 (1 + (INTVAL (operands[3]) + operands[4] = GEN_INT (exact_log2 (1 + (INTVAL (operands[3]) >> INTVAL(operands[2])))); return \"mak %0,%1,%4<%2>\"; }" @@ -386,8 +385,7 @@ "* { operands[2] - = gen_rtx (CONST_INT, SImode, - ((1 << INTVAL (operands[2])) - 1) << INTVAL (operands[4])); + = GEN_INT (((1 << INTVAL (operands[2])) - 1) << INTVAL (operands[4])); return output_and (operands); }" [(set_attr "type" "marith")]) ; arith,bit,marith. length is 1 or 2. @@ -448,8 +446,7 @@ int cv2 = condition_value (operands[3]); operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - gen_rtx (CONST_INT, VOIDmode, - ((cv2 & ~1) - (cv1 & ~1)) & 0x1f)); + GEN_INT (((cv2 & ~1) - (cv1 & ~1)) & 0x1f)); /* Reverse the condition if needed. */ if ((cv1 & 1) != (cv2 & 1)) operands[4] = gen_rtx (NOT, CCmode, operands[4]); @@ -482,8 +479,7 @@ int cv2 = condition_value (operands[3]); operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - gen_rtx (CONST_INT, VOIDmode, - (cv2 - cv1) & 0x1f)); + GEN_INT ((cv2 - cv1) & 0x1f)); }") (define_split @@ -514,8 +510,7 @@ int cv2 = condition_value (operands[3]); operands[2] = gen_rtx (ROTATE, CCmode, operands[2], - gen_rtx (CONST_INT, VOIDmode, - ((cv1 & ~1) - (cv2 & ~1)) & 0x1f)); + GEN_INT (((cv1 & ~1) - (cv2 & ~1)) & 0x1f)); }") (define_split @@ -603,8 +598,7 @@ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - gen_rtx (CONST_INT, VOIDmode, - ((cv2 & ~1) - (cv1 & ~1)) & 0x1f)); + GEN_INT (((cv2 & ~1) - (cv1 & ~1)) & 0x1f)); /* Reverse the condition if needed. */ if ((cv1 & 1) != (cv2 & 1)) operands[4] = gen_rtx (NOT, CCmode, operands[4]); @@ -636,8 +630,7 @@ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); operands[4] = gen_rtx (ROTATE, CCmode, operands[4], - gen_rtx (CONST_INT, VOIDmode, - (cv2 - cv1) & 0x1f)); + GEN_INT ((cv2 - cv1) & 0x1f)); }") (define_split @@ -667,8 +660,7 @@ int cv1 = condition_value (operands[1]); int cv2 = condition_value (operands[3]); operands[2] = gen_rtx (ROTATE, CCmode, operands[2], - gen_rtx (CONST_INT, VOIDmode, - ((cv1 & ~1) - (cv2 & ~1)) & 0x1f)); + GEN_INT (((cv1 & ~1) - (cv2 & ~1)) & 0x1f)); }") (define_split @@ -2892,7 +2884,7 @@ if (INTVAL (op1) < 0) { neg = TRUE; - op1 = gen_rtx (CONST_INT, VOIDmode, -INTVAL (op1)); + op1 = GEN_INT (-INTVAL (op1)); } op1 = force_reg (SImode, op1); @@ -2924,7 +2916,7 @@ if (INTVAL (op2) < 0) { neg = TRUE; - op2 = gen_rtx (CONST_INT, VOIDmode, -INTVAL (op2)); + op2 = GEN_INT (-INTVAL (op2)); } else if (! SMALL_INT (operands[2])) op2 = force_reg (SImode, op2); @@ -3204,10 +3196,9 @@ || integer_ok_for_set (~value))) { emit_insn (gen_andsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, - value | 0xffff))); + GEN_INT (value | 0xffff))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, value | 0xffff0000); + operands[2] = GEN_INT (value | 0xffff0000); } } }") @@ -3276,10 +3267,9 @@ || integer_ok_for_set (value))) { emit_insn (gen_iorsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, - value & 0xffff0000))); + GEN_INT (value & 0xffff0000))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, value & 0xffff); + operands[2] = GEN_INT (value & 0xffff); } } }") @@ -3351,10 +3341,9 @@ || (value & 0xffff) == 0)) { emit_insn (gen_xorsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, - value & 0xffff0000))); + GEN_INT (value & 0xffff0000))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, value & 0xffff); + operands[2] = GEN_INT (value & 0xffff); } } }") @@ -3487,7 +3476,7 @@ { if (TARGET_TRAP_LARGE_SHIFT) emit_insn (gen_tbnd (force_reg (SImode, operands[2]), - gen_rtx (CONST_INT, VOIDmode, 31))); + GEN_INT (31))); else emit_move_insn (operands[0], const0_rtx); DONE; @@ -3495,12 +3484,12 @@ } else if (TARGET_TRAP_LARGE_SHIFT) - emit_insn (gen_tbnd (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_tbnd (operands[2], GEN_INT (31))); else if (TARGET_HANDLE_LARGE_SHIFT) { rtx reg = gen_reg_rtx (SImode); - emit_insn (gen_cmpsi (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_cmpsi (operands[2], GEN_INT (31))); emit_insn (gen_sleu (reg)); emit_insn (gen_andsi3 (reg, operands[1], reg)); operands[1] = reg; @@ -3531,21 +3520,21 @@ if (TARGET_TRAP_LARGE_SHIFT) { emit_insn (gen_tbnd (force_reg (SImode, operands[2]), - gen_rtx (CONST_INT, VOIDmode, 31))); + GEN_INT (31))); DONE; } else - operands[2] = gen_rtx (CONST_INT, VOIDmode, 31); + operands[2] = GEN_INT (31); } } else if (TARGET_TRAP_LARGE_SHIFT) - emit_insn (gen_tbnd (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_tbnd (operands[2], GEN_INT (31))); else if (TARGET_HANDLE_LARGE_SHIFT) { rtx reg = gen_reg_rtx (SImode); - emit_insn (gen_cmpsi (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_cmpsi (operands[2], GEN_INT (31))); emit_insn (gen_sgtu (reg)); emit_insn (gen_iorsi3 (reg, operands[2], reg)); operands[2] = reg; @@ -3578,7 +3567,7 @@ { if (TARGET_TRAP_LARGE_SHIFT) emit_insn (gen_tbnd (force_reg (SImode, operands[2]), - gen_rtx (CONST_INT, VOIDmode, 31))); + GEN_INT (31))); else emit_move_insn (operands[0], const0_rtx); DONE; @@ -3586,12 +3575,12 @@ } else if (TARGET_TRAP_LARGE_SHIFT) - emit_insn (gen_tbnd (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_tbnd (operands[2], GEN_INT (31))); else if (TARGET_HANDLE_LARGE_SHIFT) { rtx reg = gen_reg_rtx (SImode); - emit_insn (gen_cmpsi (operands[2], gen_rtx (CONST_INT, VOIDmode, 31))); + emit_insn (gen_cmpsi (operands[2], GEN_INT (31))); emit_insn (gen_sleu (reg)); emit_insn (gen_andsi3 (reg, operands[1], reg)); operands[1] = reg; @@ -3619,8 +3608,7 @@ { if (GET_CODE (operands[2]) == CONST_INT && (unsigned) INTVAL (operands[2]) >= 32) - operands[2] = gen_rtx (CONST_INT, VOIDmode, - (32 - INTVAL (operands[2])) % 32); + operands[2] = GEN_INT ((32 - INTVAL (operands[2])) % 32); else { rtx op = gen_reg_rtx (SImode); @@ -3674,8 +3662,7 @@ "" "* { - operands[4] = gen_rtx (CONST_INT, SImode, - (32 - INTVAL (operands[2])) - INTVAL (operands[3])); + operands[4] = GEN_INT ((32 - INTVAL (operands[2])) - INTVAL (operands[3])); return \"ext %0,%1,%2<%4>\"; /* <(32-%2-%3)> */ }" [(set_attr "type" "bit")]) @@ -3696,8 +3683,7 @@ "" "* { - operands[4] = gen_rtx (CONST_INT, SImode, - (32 - INTVAL (operands[2])) - INTVAL (operands[3])); + operands[4] = GEN_INT ((32 - INTVAL (operands[2])) - INTVAL (operands[3])); return \"extu %0,%1,%2<%4>\"; /* <(32-%2-%3)> */ }" [(set_attr "type" "bit")]) @@ -3710,8 +3696,7 @@ "" "* { - operands[3] = gen_rtx (CONST_INT, SImode, - (32 - INTVAL (operands[1])) - INTVAL (operands[2])); + operands[3] = GEN_INT ((32 - INTVAL (operands[1])) - INTVAL (operands[2])); return \"clr %0,%0,%1<%3>\"; /* <(32-%1-%2)> */ }" [(set_attr "type" "bit")]) @@ -3724,8 +3709,7 @@ "" "* { - operands[3] = gen_rtx (CONST_INT, SImode, - (32 - INTVAL (operands[1])) - INTVAL (operands[2])); + operands[3] = GEN_INT ((32 - INTVAL (operands[1])) - INTVAL (operands[2])); return \"set %0,%0,%1<%3>\"; /* <(32-%1-%2)> */ }" [(set_attr "type" "bit")]) @@ -3743,11 +3727,10 @@ if (INTVAL (operands[1]) < 32) value &= (1 << INTVAL (operands[1])) - 1; - operands[2] = gen_rtx (CONST_INT, VOIDmode, - 32 - (INTVAL(operands[1]) + INTVAL(operands[2]))); + operands[2] = GEN_INT (32 - (INTVAL(operands[1]) + INTVAL(operands[2]))); value <<= INTVAL (operands[2]); - operands[3] = gen_rtx (CONST_INT, VOIDmode, value); + operands[3] = GEN_INT (value); if (SMALL_INTVAL (value)) return \"clr %0,%0,%1<%2>\;or %0,%0,%3\"; @@ -3828,7 +3811,7 @@ " { register rtx index_diff = gen_reg_rtx (SImode); - register rtx low = gen_rtx (CONST_INT, VOIDmode, -INTVAL (operands[1])); + register rtx low = GEN_INT (-INTVAL (operands[1])); register rtx label = gen_rtx (LABEL_REF, VOIDmode, operands[3]); register rtx base; diff --git a/gcc/config/ns32k/ns32k.c b/gcc/config/ns32k/ns32k.c index 0e07662fa31..1c759aed060 100644 --- a/gcc/config/ns32k/ns32k.c +++ b/gcc/config/ns32k/ns32k.c @@ -1,5 +1,5 @@ /* Subroutines for assembler code output on the NS32000. - Copyright (C) 1988, 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1988, 1994, 1995, 1996, 1997 Free Software Foundation, Inc. This file is part of GNU CC. @@ -19,8 +19,8 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* Some output-actions in ns32k.md need these. */ -#include <stdio.h> #include "config.h" +#include <stdio.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -208,7 +208,7 @@ gen_indexed_expr (base, index, scale) if (GET_CODE (base) != REG && GET_CODE (base) != CONST_INT) base = gen_rtx (MEM, SImode, base); addr = gen_rtx (MULT, SImode, index, - gen_rtx (CONST_INT, VOIDmode, 1 << INTVAL (scale))); + GEN_INT (1 << INTVAL (scale))); addr = gen_rtx (PLUS, SImode, base, addr); return addr; } diff --git a/gcc/config/ns32k/ns32k.md b/gcc/config/ns32k/ns32k.md index 28e65e6df91..5fec86dcd43 100644 --- a/gcc/config/ns32k/ns32k.md +++ b/gcc/config/ns32k/ns32k.md @@ -125,7 +125,7 @@ { cc_status.flags |= CC_REVERSED; if (INTVAL (operands[1]) > 7) - operands[1] = gen_rtx(CONST_INT, VOIDmode, i); + operands[1] = GEN_INT (i); return \"cmpqw %1,%0\"; } } @@ -136,7 +136,7 @@ if (i <= 7 && i >= -8) { if (INTVAL (operands[0]) > 7) - operands[0] = gen_rtx(CONST_INT, VOIDmode, i); + operands[0] = GEN_INT (i); return \"cmpqw %0,%1\"; } } @@ -157,7 +157,7 @@ { cc_status.flags |= CC_REVERSED; if (INTVAL (operands[1]) > 7) - operands[1] = gen_rtx(CONST_INT, VOIDmode, i); + operands[1] = GEN_INT (i); return \"cmpqb %1,%0\"; } } @@ -168,7 +168,7 @@ if (i <= 7 && i >= -8) { if (INTVAL (operands[0]) > 7) - operands[0] = gen_rtx(CONST_INT, VOIDmode, i); + operands[0] = GEN_INT (i); return \"cmpqb %0,%1\"; } } @@ -259,7 +259,7 @@ convrt.f = convrt.d; /* Is there a better machine-independent way to to this? */ - operands[1] = gen_rtx (CONST_INT, VOIDmode, convrt.i[0]); + operands[1] = GEN_INT (convrt.i[0]); return \"movd %1,%0\"; } #endif @@ -339,7 +339,7 @@ return \"lprd fp,%1\"; if (GET_CODE (operands[1]) == CONST_DOUBLE) operands[1] - = gen_rtx (CONST_INT, VOIDmode, CONST_DOUBLE_LOW (operands[1])); + = GEN_INT (CONST_DOUBLE_LOW (operands[1])); if (GET_CODE (operands[1]) == CONST_INT) { int i = INTVAL (operands[1]); @@ -400,7 +400,7 @@ rtx xoperands[3]; xoperands[0] = operands[0]; xoperands[1] = XEXP (operands[1], 0); - xoperands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (XEXP (operands[1], 1)) >> 1); + xoperands[2] = GEN_INT (INTVAL (XEXP (operands[1], 1)) >> 1); return output_shift_insn (xoperands); } return \"addr %a1,%0\"; @@ -419,7 +419,7 @@ { if (INTVAL (operands[1]) > 7) operands[1] = - gen_rtx (CONST_INT, VOIDmode, i); + GEN_INT (i); return \"movqw %1,%0\"; } return \"movw %1,%0\"; @@ -465,7 +465,7 @@ { if (INTVAL (operands[1]) > 7) operands[1] = - gen_rtx (CONST_INT, VOIDmode, char_val); + GEN_INT (char_val); return \"movqb %1,%0\"; } return \"movb %1,%0\"; @@ -543,7 +543,7 @@ #ifdef UTEK_ASM if (GET_CODE (operands[2]) == CONST_INT && (INTVAL (operands[2]) & 0x3) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) >> 2); + operands[2] = GEN_INT (INTVAL (operands[2]) >> 2); if ((unsigned) INTVAL (operands[2]) <= 7) return \"movqd %2,r0\;movsd $0\"; else @@ -556,7 +556,7 @@ #else if (GET_CODE (operands[2]) == CONST_INT && (INTVAL (operands[2]) & 0x3) == 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) >> 2); + operands[2] = GEN_INT (INTVAL (operands[2]) >> 2); if ((unsigned) INTVAL (operands[2]) <= 7) return \"movqd %2,r0\;movsd\"; else @@ -1314,8 +1314,7 @@ return \"movqb %$0,%0\"; else { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff); return \"andb %2,%0\"; } } @@ -1325,8 +1324,7 @@ return \"movqw %$0,%0\"; else { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xffff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xffff); return \"andw %2,%0\"; } } @@ -1348,8 +1346,7 @@ return \"movqb %$0,%0\"; else { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xff); + operands[2] = GEN_INT (INTVAL (operands[2]) & 0xff); return \"andb %2,%0\"; } } @@ -1865,7 +1862,7 @@ rtx xoperands[3]; xoperands[0] = operands[0]; xoperands[1] = XEXP (operands[1], 0); - xoperands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (XEXP (operands[1], 1)) >> 1); + xoperands[2] = GEN_INT (INTVAL (XEXP (operands[1], 1)) >> 1); return output_shift_insn (xoperands); } return \"addr %a1,%0\"; @@ -2040,7 +2037,7 @@ { operands[0] = adj_offsettable_operand (operands[0], INTVAL (operands[2]) / 8); - operands[2] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[2]) % 8); + operands[2] = GEN_INT (INTVAL (operands[2]) % 8); } if (INTVAL (operands[1]) <= 8) return \"inssb %3,%0,%2,%1\"; diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c index 19b41485e7d..c040c457222 100644 --- a/gcc/config/pdp11/pdp11.c +++ b/gcc/config/pdp11/pdp11.c @@ -1,5 +1,5 @@ /* Subroutines for gcc2 for pdp11. - Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc. + Copyright (C) 1994, 1995, 1996, 1997 Free Software Foundation, Inc. Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). This file is part of GNU CC. @@ -19,10 +19,8 @@ along with GNU CC; see the file COPYING. If not, write to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#ifndef FILE -#include <stdio.h> -#endif #include "config.h" +#include <stdio.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -414,10 +412,8 @@ output_move_double (operands) /* now the mess begins, high word is in lower word??? that's what ashc makes me think, but I don't remember :-( */ - latehalf[1] = gen_rtx(CONST_INT, VOIDmode, - INTVAL(operands[1])>>16); - operands[1] = gen_rtx(CONST_INT, VOIDmode, - INTVAL(operands[1])&0xff); + latehalf[1] = GEN_INT (INTVAL(operands[1])>>16); + operands[1] = GEN_INT (INTVAL(operands[1])&0xff); } else if (GET_CODE (operands[1]) == CONST_DOUBLE) { @@ -635,20 +631,16 @@ output_move_quad (operands) abort(); #ifndef HOST_WORDS_BIG_ENDIAN - latehalf[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); + latehalf[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); #else /* HOST_WORDS_BIG_ENDIAN */ - latehalf[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + latehalf[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); #endif /* HOST_WORDS_BIG_ENDIAN */ } else if (GET_CODE(operands[1]) == CONST_INT) { - latehalf[1] = gen_rtx (CONST_INT, VOIDmode, 0); + latehalf[1] = GEN_INT (0); } else abort(); diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h index 87c4954fda1..e52f77c58b5 100644 --- a/gcc/config/pdp11/pdp11.h +++ b/gcc/config/pdp11/pdp11.h @@ -1262,9 +1262,9 @@ JMP FUNCTION 0x0058 0x0000 <- FUNCTION if (TARGET_SPLIT) \ abort(); \ \ - ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x9400+STATIC_CHAIN_REGNUM)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x9400+STATIC_CHAIN_REGNUM)); \ ASM_OUTPUT_INT (FILE, const0_rtx); \ - ASM_OUTPUT_INT (FILE, gen_rtx(CONST_INT, VOIDmode, 0x0058)); \ + ASM_OUTPUT_INT (FILE, GEN_INT(0x0058)); \ ASM_OUTPUT_INT (FILE, const0_rtx); \ } diff --git a/gcc/config/pdp11/pdp11.md b/gcc/config/pdp11/pdp11.md index d23c2cd6657..f93d1ce0aed 100644 --- a/gcc/config/pdp11/pdp11.md +++ b/gcc/config/pdp11/pdp11.md @@ -1,5 +1,5 @@ ;;- Machine description for the pdp11 for GNU C compiler -;; Copyright (C) 1994, 1995 Free Software Foundation, Inc. +;; Copyright (C) 1994, 1995, 1997 Free Software Foundation, Inc. ;; Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). ;; This file is part of GNU CC. @@ -48,7 +48,7 @@ ;; The only thing that remains to be done then is output ;; the floats in a way the assembler can handle it (and ;; if you're really into it, use a PDP11 float emulation -;; libary to do floating point constant folding - but +;; library to do floating point constant folding - but ;; I guess you'll get reasonable results even when not ;; doing this) ;; the last thing to do is fix the UPDATE_CC macro to check @@ -682,20 +682,26 @@ ;; let constraints only accept a register ... (define_expand "movstrhi" - [(parallel [(set (mem:BLK (match_operand:BLK 0 "general_operand" "=g,g")) - (mem:BLK (match_operand:BLK 1 "general_operand" "g,g"))) + [(parallel [(set (match_operand:BLK 0 "general_operand" "=g,g") + (match_operand:BLK 1 "general_operand" "g,g")) (use (match_operand:HI 2 "arith_operand" "n,&mr")) (use (match_operand:HI 3 "immediate_operand" "i,i")) (clobber (match_scratch:HI 4 "=&r,X")) - (clobber (match_dup 0)) - (clobber (match_dup 1)) + (clobber (match_dup 5)) + (clobber (match_dup 6)) (clobber (match_dup 2))])] "(TARGET_BCOPY_BUILTIN)" " { - operands[0] = copy_to_mode_reg (Pmode, XEXP (operands[0], 0)); - operands[1] = copy_to_mode_reg (Pmode, XEXP (operands[1], 0)); - operands[2] = force_not_mem (operands[2]); + operands[0] + = change_address (operands[0], VOIDmode, + copy_to_mode_reg (Pmode, XEXP (operands[0], 0))); + operands[1] + = change_address (operands[1], VOIDmode, + copy_to_mode_reg (Pmode, XEXP (operands[1], 0))); + + operands[5] = XEXP (operands[0], 0); + operands[6] = XEXP (operands[1], 0); }") @@ -1010,8 +1016,8 @@ return \"\"; } - lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); if (INTVAL(operands[2])) { @@ -1148,7 +1154,7 @@ { extern rtx expand_unop (); if (GET_CODE (operands[2]) == CONST_INT) - operands[2] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (operands[2])); + operands[2] = GEN_INT (~INTVAL (operands[2])); else operands[2] = expand_unop (SImode, one_cmpl_optab, operands[2], 0, 1); }") @@ -1162,7 +1168,7 @@ { extern rtx expand_unop (); if (GET_CODE (operands[2]) == CONST_INT) - operands[2] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (operands[2])); + operands[2] = GEN_INT (~INTVAL (operands[2])); else operands[2] = expand_unop (HImode, one_cmpl_optab, operands[2], 0, 1); }") @@ -1177,8 +1183,7 @@ extern rtx expand_unop (); rtx op = operands[2]; if (GET_CODE (op) == CONST_INT) - operands[2] = gen_rtx (CONST_INT, VOIDmode, - ((1 << 8) - 1) & ~INTVAL (op)); + operands[2] = GEN_INT (((1 << 8) - 1) & ~INTVAL (op)); else operands[2] = expand_unop (QImode, one_cmpl_optab, op, 0, 1); }") @@ -1217,8 +1222,8 @@ return \"\"; } - lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); /* these have different lengths, so we should have different constraints! */ @@ -1283,8 +1288,8 @@ return \"\"; } - lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); /* these have different lengths, so we should have different constraints! */ @@ -1339,8 +1344,8 @@ return \"\"; } - lateoperands[2] = gen_rtx(CONST_INT, VOIDmode, (INTVAL(operands[2]) >> 16) & 0xffff); - operands[2] = gen_rtx(CONST_INT, VOIDmode, INTVAL(operands[2]) & 0xffff); + lateoperands[2] = GEN_INT ((INTVAL(operands[2]) >> 16) & 0xffff); + operands[2] = GEN_INT (INTVAL(operands[2]) & 0xffff); if (INTVAL(operands[2])) output_asm_insn (\"xor %2, %0\", operands); diff --git a/gcc/config/pyr/pyr.c b/gcc/config/pyr/pyr.c index 3203377e2c7..9a2e3bc91e8 100644 --- a/gcc/config/pyr/pyr.c +++ b/gcc/config/pyr/pyr.c @@ -1,5 +1,5 @@ /* Subroutines for insn-output.c for Pyramid 90x, 9000, and MIServer Series. - Copyright (C) 1989, 1991 Free Software Foundation, Inc. + Copyright (C) 1989, 1991, 1997 Free Software Foundation, Inc. This file is part of GNU CC. @@ -19,8 +19,8 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* Some output-actions in pyr.md need these. */ -#include <stdio.h> #include "config.h" +#include <stdio.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -256,9 +256,8 @@ extend_const (x, extop, from_mode, to_mode) else val = val & ~((-1) << (GET_MODE_BITSIZE (from_mode))); if (GET_MODE_BITSIZE (to_mode) == HOST_BITS_PER_INT) - return gen_rtx (CONST_INT, VOIDmode, val); - return gen_rtx (CONST_INT, VOIDmode, - val & ~((-1) << (GET_MODE_BITSIZE (to_mode)))); + return GEN_INT (val); + return GEN_INT (val & ~((-1) << (GET_MODE_BITSIZE (to_mode)))); } rtx @@ -625,16 +624,13 @@ output_move_double (operands) || (CONST_DOUBLE_HIGH (const_op) == -1 && CONST_DOUBLE_LOW (const_op) < 0)) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (const_op)); return "movl %1,%0"; } - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_HIGH (const_op)); output_asm_insn ("movw %1,%0", operands); operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (const_op)); return "movw %1,%0"; } else @@ -646,16 +642,13 @@ output_move_double (operands) || (CONST_DOUBLE_LOW (const_op) == -1 && CONST_DOUBLE_HIGH (const_op) < 0)) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_HIGH (const_op)); return "movl %1,%0"; } - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (const_op)); output_asm_insn ("movw %1,%0", operands); operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (const_op)); + operands[1] = GEN_INT (CONST_DOUBLE_HIGH (const_op)); return "movw %1,%0"; } } @@ -680,7 +673,7 @@ output_shift (pattern, op2, mod) cc_status = cc_prev_status; return ""; } - op2 = gen_rtx (CONST_INT, VOIDmode, cnt); + op2 = GEN_INT (cnt); } return pattern; } diff --git a/gcc/config/pyr/pyr.h b/gcc/config/pyr/pyr.h index a6194851599..42d55c0b84b 100644 --- a/gcc/config/pyr/pyr.h +++ b/gcc/config/pyr/pyr.h @@ -736,10 +736,10 @@ extern void* pyr_function_arg (); jump $<func> # S2R */ #define TRAMPOLINE_TEMPLATE(FILE) \ -{ ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x2100001C)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x40000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); } +{ ASM_OUTPUT_INT (FILE, GEN_INT (0x2100001C)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x40000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); } #define TRAMPOLINE_SIZE 16 #define TRAMPOLINE_ALIGNMENT 32 diff --git a/gcc/config/pyr/pyr.md b/gcc/config/pyr/pyr.md index 97d91014595..c1d440a5ed4 100644 --- a/gcc/config/pyr/pyr.md +++ b/gcc/config/pyr/pyr.md @@ -720,8 +720,7 @@ "* { if (GET_CODE (operands[1]) == CONST_DOUBLE) - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); return \"movl %1,%0\"; }") @@ -1097,7 +1096,7 @@ int dealloc_size = current_function_pretend_args_size; if (current_function_pops_args) dealloc_size += current_function_args_size; - operands[0] = gen_rtx (CONST_INT, VOIDmode, dealloc_size); + operands[0] = GEN_INT (dealloc_size); return \"retd %0\"; } else @@ -1263,10 +1262,8 @@ xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"addw %1,%0\", xoperands); return \"addwc %2,%0\"; @@ -1286,10 +1283,8 @@ xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"subw %1,%0\", xoperands); return \"subwb %2,%0\"; @@ -1309,10 +1304,8 @@ xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"orw %1,%0\", xoperands); return \"orw %2,%0\"; @@ -1332,10 +1325,8 @@ xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"andw %1,%0\", xoperands); return \"andw %2,%0\"; @@ -1355,10 +1346,8 @@ xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[2]) + 1); else { - xoperands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[2])); - operands[2] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[2])); + xoperands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_HIGH (operands[2])); } output_asm_insn (\"xorw %1,%0\", xoperands); return \"xorw %2,%0\"; diff --git a/gcc/config/romp/romp.c b/gcc/config/romp/romp.c index 5926b74dce7..0f64a9e7c18 100644 --- a/gcc/config/romp/romp.c +++ b/gcc/config/romp/romp.c @@ -1,5 +1,5 @@ /* Subroutines used for code generation on ROMP. - Copyright (C) 1990, 1991, 1992, 1993 Free Software Foundation, Inc. + Copyright (C) 1990, 1991, 1992, 1993, 1997 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@nyu.edu) This file is part of GNU CC. @@ -20,8 +20,8 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include <stdio.h> #include "config.h" +#include <stdio.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -1222,7 +1222,7 @@ output_epilog (file, size) if (write_code) output_loadsave_fpregs (file, CLOBBER, gen_rtx (PLUS, Pmode, gen_rtx (REG, Pmode, 1), - gen_rtx (CONST_INT, VOIDmode, fp_save))); + GEN_INT (fp_save))); /* If we push the stack and do not have size > 32K, adjust the register save location to the current position of sp. Otherwise, if long frame, @@ -1317,7 +1317,7 @@ struct symref_hashent { static struct symref_hashent *symref_hash_table[SYMHASHSIZE]; -/* Given a name (allocatable in temporary storage), return a SYMBOL_REF +/* Given a name (allocable in temporary storage), return a SYMBOL_REF for the name. The rtx is allocated from the current rtl_obstack, while the name string is allocated from the permanent obstack. */ rtx @@ -1739,7 +1739,7 @@ output_loadsave_fpregs (file, code, addr) if (mask) fprintf (file, "\t%s\n", - output_fpop (code, gen_rtx (CONST_INT, VOIDmode, mask), + output_fpop (code, GEN_INT (mask), gen_rtx (MEM, Pmode, addr), 0, const0_rtx)); diff --git a/gcc/config/romp/romp.h b/gcc/config/romp/romp.h index 158f2ef8268..0add9ee2467 100644 --- a/gcc/config/romp/romp.h +++ b/gcc/config/romp/romp.h @@ -272,12 +272,12 @@ extern int target_flags; /* Place to put static chain when calling a function that requires it. */ #define STATIC_CHAIN \ gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, stack_pointer_rtx, \ - gen_rtx (CONST_INT, VOIDmode, -36))) + GEN_INT (-36))) /* Place where static chain is found upon entry to routine. */ #define STATIC_CHAIN_INCOMING \ gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, arg_pointer_rtx, \ - gen_rtx (CONST_INT, VOIDmode, -20))) + GEN_INT (-20))) /* Place that structure value return address is placed. @@ -812,7 +812,7 @@ struct rt_cargs {int gregs, fregs; }; rtx _val; \ \ _temp = expand_binop (SImode, add_optab, ADDR, \ - gen_rtx (CONST_INT, VOIDmode, 4), \ + GEN_INT (4), \ 0, 1, OPTAB_LIB_WIDEN); \ emit_move_insn (gen_rtx (MEM, SImode, \ memory_address (SImode, ADDR)), _temp); \ @@ -1077,9 +1077,8 @@ struct rt_cargs {int gregs, fregs; }; (X) = gen_rtx (PLUS, SImode, \ force_operand \ (gen_rtx (PLUS, SImode, XEXP (X, 0), \ - gen_rtx (CONST_INT, VOIDmode, \ - high_int << 16)), 0),\ - gen_rtx (CONST_INT, VOIDmode, low_int)); \ + GEN_INT (high_int << 16)), 0),\ + GEN_INT (, low_int)); \ } \ } @@ -1585,7 +1584,7 @@ extern int romp_debugger_arg_correction(); else if (GET_CODE (addr) == SYMBOL_REF \ && CONSTANT_POOL_ADDRESS_P (addr)) \ { \ - offset = gen_rtx (CONST_INT, VOIDmode, get_pool_offset (addr) + 12); \ + offset = GEN_INT (get_pool_offset (addr) + 12); \ base = gen_rtx (REG, SImode, 14); \ } \ else if (GET_CODE (addr) == CONST \ diff --git a/gcc/config/romp/romp.md b/gcc/config/romp/romp.md index 2177c191065..3abd56b7dab 100644 --- a/gcc/config/romp/romp.md +++ b/gcc/config/romp/romp.md @@ -181,7 +181,7 @@ { /* Can do this by loading the negative constant and then negating. */ emit_move_insn (operands[0], - gen_rtx (CONST_INT, VOIDmode, - const_val)); + GEN_INT (- const_val)); emit_insn (gen_negsi2 (operands[0], operands[0])); DONE; } @@ -196,9 +196,9 @@ i = high_part, high_part = low_part, low_part = i; emit_move_insn (operands[0], - gen_rtx (CONST_INT, VOIDmode, low_part)); + GEN_INT (low_part)); emit_insn (gen_iorsi3 (operands[0], operands[0], - gen_rtx (CONST_INT, VOIDmode, high_part))); + GEN_INT (high_part))); DONE; } } @@ -486,7 +486,7 @@ operands[6] = operands[2]; operands[7] = gen_rtx (MEM, SImode, gen_rtx (PLUS, SImode, operands[2], - gen_rtx (CONST_INT, VOIDmode, 4))); + GEN_INT (4))); if (operands[2] == 0 || operands[4] == 0) FAIL; @@ -507,7 +507,7 @@ operands[5] = operand_subword (operands[1], 0, 0, DImode); operands[6] = gen_rtx (MEM, SImode, gen_rtx (PLUS, SImode, operands[2], - gen_rtx (CONST_INT, VOIDmode, 4))); + GEN_INT (4))); operands[7] = operand_subword (operands[1], 1, 0, DImode); if (operands[5] == 0 || operands[7] == 0) @@ -816,7 +816,7 @@ operands[5] = operand_subword (operands[0], 1, 0, DFmode); operands[6] = gen_rtx (MEM, SImode, gen_rtx (PLUS, SImode, gen_rtx (REG, SImode, 15), - gen_rtx (CONST_INT, VOIDmode, 4))); + GEN_INT (4))); if (operands[3] == 0 || operands[5] == 0) FAIL; @@ -837,7 +837,7 @@ operands[4] = operand_subword (operands[1], 0, 0, DFmode); operands[5] = gen_rtx (MEM, SImode, gen_rtx (PLUS, SImode, gen_rtx (REG, SImode, 15), - gen_rtx (CONST_INT, VOIDmode, 4))); + GEN_INT (4))); operands[6] = operand_subword (operands[1], 1, 0, DFmode); if (operands[4] == 0 || operands[6] == 0) @@ -1209,9 +1209,9 @@ high++, low |= 0xffff0000; emit_insn (gen_addsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, high << 16))); + GEN_INT (high << 16))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, low); + operands[2] = GEN_INT (low); } }") @@ -1259,8 +1259,7 @@ if (GET_CODE (operands [2]) == CONST_INT) { emit_insn (gen_addsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, - VOIDmode, - INTVAL (operands[2])))); + GEN_INT (- INTVAL (operands[2])))); DONE; } else @@ -1516,10 +1515,9 @@ if (top != 0 && top != 0xffff && bottom != 0 && bottom != 0xffff) { emit_insn (gen_andsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, - (top << 16) | 0xffff))); + GEN_INT ((top << 16) | 0xffff))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, 0xffff0000 | bottom); + operands[2] = GEN_INT (0xffff0000 | bottom); } } }"); @@ -1552,9 +1550,9 @@ if (top != 0 && bottom != 0) { emit_insn (gen_iorsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, (top << 16)))); + GEN_INT ((top << 16)))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, bottom); + operands[2] = GEN_INT (bottom); } } }"); @@ -1592,9 +1590,9 @@ else if (top != 0 && bottom != 0) { emit_insn (gen_xorsi3 (operands[0], operands[1], - gen_rtx (CONST_INT, VOIDmode, (top << 16)))); + GEN_INT ((top << 16)))); operands[1] = operands[0]; - operands[2] = gen_rtx (CONST_INT, VOIDmode, bottom); + operands[2] = GEN_INT (bottom); } } }"); @@ -1979,7 +1977,7 @@ result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, SFmode), - gen_rtx (CONST_INT, VOIDmode, 0x80000000), + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); @@ -2013,7 +2011,7 @@ start_sequence (); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, DFmode), - gen_rtx (CONST_INT, VOIDmode, 0x80000000), + GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 9bd5afd6959..da07fbf97c6 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2196,8 +2196,7 @@ int insert_size = INTVAL (operands[1]) & 31; /* Align extract field with insert field */ - operands[5] = gen_rtx (CONST_INT, VOIDmode, - extract_start + extract_size - insert_start - insert_size); + operands[5] = GEN_INT (extract_start + extract_size - insert_start - insert_size); operands[1] = GEN_INT (insert_start + insert_size - 1); return \"{rlimi|rlwimi} %0,%3,%h5,%h2,%h1\"; }") @@ -2272,8 +2271,7 @@ if ((start > 0 && start + size <= 16) || start >= 16) { - operands[3] = gen_rtx (CONST_INT, VOIDmode, - ((1 << (16 - (start & 15))) + operands[3] = GEN_INT (((1 << (16 - (start & 15))) - (1 << (16 - (start & 15) - size)))); if (start < 16) return \"{andiu.|andis.} %4,%1,%3\"; @@ -4908,8 +4906,7 @@ (set (match_dup 0) (ior:DI (match_dup 0) (match_dup 4)))] " { - operands[3] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff)); + operands[3] = GEN_INT (INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff)); operands[4] = GEN_INT (INTVAL (operands[2]) & 0xffff); }") @@ -4956,8 +4953,7 @@ (set (match_dup 0) (xor:DI (match_dup 0) (match_dup 4)))] " { - operands[3] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[2]) & 0xffff0000); + operands[3] = GEN_INT (INTVAL (operands[2]) & 0xffff0000); operands[4] = GEN_INT (INTVAL (operands[2]) & 0xffff); }") @@ -5355,8 +5351,7 @@ (match_dup 3)))] " { - operands[2] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[1]) & 0xffff0000); + operands[2] = GEN_INT (INTVAL (operands[1]) & 0xffff0000); operands[3] = GEN_INT (INTVAL (operands[1]) & 0xffff); }") diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index eb4c46d356e..327ee2730b5 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -1973,8 +1973,7 @@ output_move_double (operands) { if (arith_double_operand (op1, DImode)) { - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (op1)); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (op1)); return "mov %1,%0"; } else @@ -2647,7 +2646,7 @@ output_size_for_block_move (size, reg, align) else { xoperands[1] - = gen_rtx (CONST_INT, VOIDmode, INTVAL (size) - INTVAL (align)); + = GEN_INT (INTVAL (size) - INTVAL (align)); output_asm_insn ("set %1,%0", xoperands); } } @@ -2685,7 +2684,7 @@ output_block_move (operands) if (align > UNITS_PER_WORD) { align = UNITS_PER_WORD; - alignrtx = gen_rtx (CONST_INT, VOIDmode, UNITS_PER_WORD); + alignrtx = GEN_INT (UNITS_PER_WORD); } /* We consider 8 ld/st pairs, for a total of 16 inline insns to be @@ -2781,11 +2780,11 @@ output_block_move (operands) } if (align != INTVAL (alignrtx)) - alignrtx = gen_rtx (CONST_INT, VOIDmode, align); + alignrtx = GEN_INT (align); - xoperands[3] = gen_rtx (CONST_INT, VOIDmode, movstrsi_label++); - xoperands[4] = gen_rtx (CONST_INT, VOIDmode, align); - xoperands[5] = gen_rtx (CONST_INT, VOIDmode, movstrsi_label++); + xoperands[3] = GEN_INT (movstrsi_label++); + xoperands[4] = GEN_INT (align); + xoperands[5] = GEN_INT (movstrsi_label++); ASM_GENERATE_INTERNAL_LABEL (label3, "Lm", INTVAL (xoperands[3])); ASM_GENERATE_INTERNAL_LABEL (label5, "Lm", INTVAL (xoperands[5])); @@ -4583,7 +4582,7 @@ output_return (operands) the stack pointer might have been adjusted. Output code to restore it now. */ - operands[0] = gen_rtx (CONST_INT, VOIDmode, actual_fsize); + operands[0] = GEN_INT (actual_fsize); /* Use sub of negated value in first two cases instead of add to allow actual_fsize == 4096. */ @@ -4597,7 +4596,7 @@ output_return (operands) } else if (actual_fsize <= 8192) { - operands[0] = gen_rtx (CONST_INT, VOIDmode, actual_fsize - 4096); + operands[0] = GEN_INT (actual_fsize - 4096); if (SKIP_CALLERS_UNIMP_P) return "sub %%sp,-4096,%%sp\n\tjmp %%o7+12\n\tsub %%sp,-%0,%%sp"; else @@ -5045,8 +5044,8 @@ output_double_int (file, value) high = (xword >> 32) & 0xffffffff; low = xword & 0xffffffff; - ASM_OUTPUT_INT (file, gen_rtx (CONST_INT, VOIDmode, high)); - ASM_OUTPUT_INT (file, gen_rtx (CONST_INT, VOIDmode, low)); + ASM_OUTPUT_INT (file, GEN_INT (high)); + ASM_OUTPUT_INT (file, GEN_INT (low)); #else if (INTVAL (value) < 0) ASM_OUTPUT_INT (file, constm1_rtx); @@ -5057,10 +5056,8 @@ output_double_int (file, value) } else if (GET_CODE (value) == CONST_DOUBLE) { - ASM_OUTPUT_INT (file, gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (value))); - ASM_OUTPUT_INT (file, gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (value))); + ASM_OUTPUT_INT (file, GEN_INT (CONST_DOUBLE_HIGH (value))); + ASM_OUTPUT_INT (file, GEN_INT (CONST_DOUBLE_LOW (value))); } else if (GET_CODE (value) == SYMBOL_REF || GET_CODE (value) == CONST @@ -5260,16 +5257,12 @@ sparc_initialize_trampoline (tramp, fnaddr, cxt) size_int (10), 0, 1); rtx high_fn = expand_shift (RSHIFT_EXPR, SImode, fnaddr, size_int (10), 0, 1); - rtx low_cxt = expand_and (cxt, gen_rtx (CONST_INT, VOIDmode, 0x3ff), 0); - rtx low_fn = expand_and (fnaddr, gen_rtx (CONST_INT, VOIDmode, 0x3ff), 0); - rtx g1_sethi = gen_rtx (HIGH, SImode, - gen_rtx (CONST_INT, VOIDmode, 0x03000000)); - rtx g2_sethi = gen_rtx (HIGH, SImode, - gen_rtx (CONST_INT, VOIDmode, 0x05000000)); - rtx g1_ori = gen_rtx (HIGH, SImode, - gen_rtx (CONST_INT, VOIDmode, 0x82106000)); - rtx g2_ori = gen_rtx (HIGH, SImode, - gen_rtx (CONST_INT, VOIDmode, 0x8410A000)); + rtx low_cxt = expand_and (cxt, GEN_INT (0x3ff), 0); + rtx low_fn = expand_and (fnaddr, GEN_INT (0x3ff), 0); + rtx g1_sethi = gen_rtx (HIGH, SImode, GEN_INT (0x03000000)); + rtx g2_sethi = gen_rtx (HIGH, SImode, GEN_INT (0x05000000)); + rtx g1_ori = gen_rtx (HIGH, SImode, GEN_INT (0x82106000)); + rtx g2_ori = gen_rtx (HIGH, SImode, GEN_INT (0x8410A000)); rtx tem = gen_reg_rtx (SImode); emit_move_insn (tem, g1_sethi); emit_insn (gen_iorsi3 (high_fn, high_fn, tem)); diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 9ec92c872a9..ce57192135b 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -1095,13 +1095,13 @@ extern int sparc_mode_class[]; ? 0 \ : gen_rtx (MEM, Pmode, \ gen_rtx (PLUS, Pmode, stack_pointer_rtx, \ - gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))) + GEN_INT (STRUCT_VALUE_OFFSET)))) #define STRUCT_VALUE_INCOMING \ (TARGET_ARCH64 \ ? 0 \ : gen_rtx (MEM, Pmode, \ gen_rtx (PLUS, Pmode, frame_pointer_rtx, \ - gen_rtx (CONST_INT, VOIDmode, STRUCT_VALUE_OFFSET)))) + GEN_INT (STRUCT_VALUE_OFFSET)))) /* Define the classes of registers for register constraints in the machine description. Also define ranges of constants. @@ -2120,11 +2120,11 @@ do { \ } \ else \ { \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x81C04000)); \ - ASM_OUTPUT_INT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x81C04000)); \ + ASM_OUTPUT_INT (FILE, GEN_INT (0x00000000)); \ } \ } while (0) @@ -2176,7 +2176,7 @@ extern struct rtx_def *sparc_builtin_saveregs (); that holds the dynamic chain--the previous frame's address. ??? -mflat support? */ #define DYNAMIC_CHAIN_ADDRESS(frame) \ - gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 14 * UNITS_PER_WORD)) + gen_rtx (PLUS, Pmode, frame, GEN_INT (14 * UNITS_PER_WORD)) /* The return address isn't on the stack, it is in a register, so we can't access it from the current frame pointer. We can access it from the diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 13c2f0e7300..ac79f682757 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -5507,9 +5507,9 @@ #if 0 if (operands[3]) - nregs_rtx = gen_rtx (CONST_INT, VOIDmode, REGNO (operands[3]) - 8); + nregs_rtx = GEN_INT (REGNO (operands[3]) - 8); else - nregs_rtx = gen_rtx (CONST_INT, VOIDmode, 6); + nregs_rtx = GEN_INT (6); #else nregs_rtx = const0_rtx; #endif diff --git a/gcc/config/spur/spur.c b/gcc/config/spur/spur.c index 5837cbbfe3a..83e37b8aeef 100644 --- a/gcc/config/spur/spur.c +++ b/gcc/config/spur/spur.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for SPUR. Adapted from routines for the Motorola 68000 family. - Copyright (C) 1988, 1991 Free Software Foundation, Inc. + Copyright (C) 1988, 1991, 1997 Free Software Foundation, Inc. This file is part of GNU CC. @@ -20,6 +20,7 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include "config.h" +#include <stdio.h> #include "rtl.h" #include "regs.h" #include "hard-reg-set.h" @@ -152,10 +153,8 @@ output_move_double (operands) { if (GET_CODE (operands[1]) == CONST_DOUBLE) { - latehalf[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_HIGH (operands[1])); - operands[1] = gen_rtx (CONST_INT, VOIDmode, - CONST_DOUBLE_LOW (operands[1])); + latehalf[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); } else if (CONSTANT_P (operands[1])) latehalf[1] = const0_rtx; @@ -225,10 +224,10 @@ output_fp_move_double (operands) rtx xoperands[2]; int offset = - get_frame_size () - 8; xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset + 4); + xoperands[0] = GEN_INT (offset + 4); output_asm_insn ("st_32 %1,r25,%0", xoperands); xoperands[1] = operands[1]; - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset); + xoperands[0] = GEN_INT (offset); output_asm_insn ("st_32 %1,r25,%0", xoperands); xoperands[1] = operands[0]; output_asm_insn ("ld_dbl %1,r25,%0\n\tnop", xoperands); @@ -242,13 +241,13 @@ output_fp_move_double (operands) { rtx xoperands[2]; int offset = - get_frame_size () - 8; - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset); + xoperands[0] = GEN_INT (offset); xoperands[1] = operands[1]; output_asm_insn ("st_dbl %1,r25,%0", xoperands); xoperands[1] = operands[0]; output_asm_insn ("ld_32 %1,r25,%0\n\tnop", xoperands); xoperands[1] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1); - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset + 4); + xoperands[0] = GEN_INT (offset + 4); output_asm_insn ("ld_32 %1,r25,%0\n\tnop", xoperands); return ""; } @@ -297,7 +296,7 @@ output_add_large_offset (target, reg, offset) (unsigned) (high + 0x2000) >= 0x4000; high >>= 1, n += 1) ; - operands[2] = gen_rtx (CONST_INT, VOIDmode, high); + operands[2] = GEN_INT (high); output_asm_insn ("add_nt r2,r0,%2", operands); i = n; while (i >= 3) @@ -309,7 +308,7 @@ output_add_large_offset (target, reg, offset) output_asm_insn ("add_nt %0,r2,%1", operands); if (offset - (high << n) != 0) { - operands[2] = gen_rtx (CONST_INT, VOIDmode, offset - (high << n)); + operands[2] = GEN_INT (offset - (high << n)); output_asm_insn ("add_nt %0,%0,%2", operands); } return ""; diff --git a/gcc/config/spur/spur.md b/gcc/config/spur/spur.md index f95e8e04695..7ad4af5b342 100644 --- a/gcc/config/spur/spur.md +++ b/gcc/config/spur/spur.md @@ -297,7 +297,7 @@ emit_insn (gen_rtx (SET, VOIDmode, subreg, gen_rtx (ZERO_EXTRACT, SImode, tem, - gen_rtx (CONST_INT, VOIDmode, 8), + GEN_INT (8), addr))); } else if (GET_CODE (operands[0]) == MEM) @@ -318,7 +318,7 @@ emit_insn (gen_rtx (SET, VOIDmode, gen_rtx (ZERO_EXTRACT, SImode, tem, - gen_rtx (CONST_INT, VOIDmode, 8), + GEN_INT (8), addr), subreg)); emit_move_insn (gen_rtx (MEM, SImode, addr), tem); @@ -376,7 +376,7 @@ ; && (unsigned) INTVAL (operands[1]) < 32" ; "* ;{ -; operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) / 8); +; operands[1] = GEN_INT (INTVAL (operands[1]) / 8); ; return \"wr_insert 0,0,%1\;insert %0,%0,%2\"; ;}") @@ -467,9 +467,8 @@ (set (mem:SI (match_dup 0)) (match_dup 2))] "" - " operands[5] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) & 255); - operands[6] = gen_rtx (CONST_INT, VOIDmode, - (INTVAL (operands[1]) >> 8) & 255); + " operands[5] = GEN_INT (INTVAL (operands[1]) & 255); + operands[6] = GEN_INT ((INTVAL (operands[1]) >> 8) & 255); ") ;; Main entry for generating insns to move halfwords. @@ -563,7 +562,7 @@ ; && (unsigned) INTVAL (operands[1]) < 32" ; "* ;{ -; operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) / 8); +; operands[1] = GEN_INT (INTVAL (operands[1]) / 8); ; return \"wr_insert 0,0,%1\;insert %0,%0,%2\"; ;}") @@ -631,7 +630,7 @@ rtx xoperands[2]; int offset = - get_frame_size () - 8; xoperands[1] = operands[1]; - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset); + xoperands[0] = GEN_INT (offset); output_asm_insn (\"st_32 %1,r25,%0\", xoperands); xoperands[1] = operands[0]; output_asm_insn (\"ld_sgl %1,r25,%0\;nop\", xoperands); @@ -645,7 +644,7 @@ { rtx xoperands[2]; int offset = - get_frame_size () - 8; - xoperands[0] = gen_rtx (CONST_INT, VOIDmode, offset); + xoperands[0] = GEN_INT (offset); xoperands[1] = operands[1]; output_asm_insn (\"st_sgl %1,r25,%0\", xoperands); xoperands[1] = operands[0]; @@ -705,7 +704,7 @@ else operands[1] = gen_rtx (SUBREG, SImode, operands[1], 0); - operands[2] = force_reg (SImode, gen_rtx (CONST_INT, VOIDmode, 65535)); + operands[2] = force_reg (SImode, GEN_INT (65535)); }") (define_insn "zero_extendqihi2" @@ -744,8 +743,8 @@ operands[2] = gen_reg_rtx (SImode); operands[3] = gen_reg_rtx (SImode); - operands[4] = force_reg (SImode, gen_rtx (CONST_INT, VOIDmode, 65535)); - operands[5] = force_reg (SImode, gen_rtx (CONST_INT, VOIDmode, -32768)); + operands[4] = force_reg (SImode, GEN_INT (65535)); + operands[5] = force_reg (SImode, GEN_INT (-32768)); }") (define_expand "extendqihi2" diff --git a/gcc/config/tahoe/tahoe.md b/gcc/config/tahoe/tahoe.md index 101d69f6822..021c1b01032 100644 --- a/gcc/config/tahoe/tahoe.md +++ b/gcc/config/tahoe/tahoe.md @@ -1,5 +1,5 @@ ;; Machine description for GNU compiler, Tahoe version -;; Copyright (C) 1989, 1994, 1996 Free Software Foundation, Inc. +;; Copyright (C) 1989, 1994, 1996, 1997 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -1015,7 +1015,7 @@ "* { if (INTVAL (operands[1]) > 32767) - operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) + 0xffff0000); + operands[1] = GEN_INT (INTVAL (operands[1]) + 0xffff0000); return \"cmpw %0,%1\"; }") @@ -1062,7 +1062,7 @@ "* { if (INTVAL (operands[1]) > 127) - operands[1] = gen_rtx (CONST_INT, VOIDmode, INTVAL (operands[1]) + 0xffffff00); + operands[1] = GEN_INT (INTVAL (operands[1]) + 0xffffff00); return \"cmpb %0,%1\"; }") @@ -1143,7 +1143,7 @@ (define_insn "tsthi" [(set (cc0) - (match_operand:HI 0 "extendable_operand" "m,!r"))] + (match_operand:HI 0 "extensible_operand" "m,!r"))] "GET_MODE (operands[0]) != VOIDmode" "* { @@ -1179,7 +1179,7 @@ (define_insn "tstqi" [(set (cc0) - (match_operand:QI 0 "extendable_operand" "m,!r"))] + (match_operand:QI 0 "extensible_operand" "m,!r"))] "GET_MODE (operands[0]) != VOIDmode" "* { @@ -1591,7 +1591,7 @@ "" "* { - operands[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) + 4)); + operands[1] = GEN_INT ((INTVAL (operands[1]) + 4)); if (GET_CODE(operands[0]) == MEM && CONSTANT_ADDRESS_P (XEXP(operands[0], 0)) && INTVAL (operands[1]) < 64) @@ -1609,7 +1609,7 @@ "" "* { - operands[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) + 4)); + operands[2] = GEN_INT ((INTVAL (operands[2]) + 4)); if (GET_CODE(operands[1]) == MEM && CONSTANT_ADDRESS_P (XEXP(operands[1], 0)) && INTVAL (operands[2]) < 64) @@ -2057,7 +2057,7 @@ ; "* ;{ ; operands[1] -; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1]))); +; = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbs %1,%0,%l2\"; ;}") ; @@ -2074,7 +2074,7 @@ ; "* ;{ ; operands[1] -; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1]))); +; = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbc %1,%0,%l2\"; ;}") ; @@ -2091,7 +2091,7 @@ ; "* ;{ ; operands[1] -; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1]))); +; = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbc %1,%0,%l2\"; ;}") ; @@ -2108,6 +2108,6 @@ ; "* ;{ ; operands[1] -; = gen_rtx (CONST_INT, VOIDmode, exact_log2 (INTVAL (operands[1]))); +; = GEN_INT (exact_log2 (INTVAL (operands[1]))); ; return \"bbs %1,%0,%l2\"; ;}") diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h index 0e1a6703caf..1c96e1e7397 100644 --- a/gcc/config/vax/vax.h +++ b/gcc/config/vax/vax.h @@ -348,7 +348,7 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES }; return an rtx for the address of the word in the frame that holds the dynamic chain--the previous frame's address. */ #define DYNAMIC_CHAIN_ADDRESS(frame) \ -gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12)) +gen_rtx (PLUS, Pmode, frame, GEN_INT (12)) /* If we generate an insn to push BYTES bytes, this says how many the stack pointer really advances by. @@ -533,10 +533,10 @@ gen_rtx (PLUS, Pmode, frame, gen_rtx (CONST_INT, VOIDmode, 12)) #define TRAMPOLINE_TEMPLATE(FILE) \ { \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x8fd0)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x8fd0)); \ ASM_OUTPUT_INT (FILE, const0_rtx); \ ASM_OUTPUT_BYTE (FILE, 0x50+STATIC_CHAIN_REGNUM); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x9f17)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x9f17)); \ ASM_OUTPUT_INT (FILE, const0_rtx); \ } diff --git a/gcc/config/vax/vax.md b/gcc/config/vax/vax.md index c3a2ae39588..fce9a8e0bff 100644 --- a/gcc/config/vax/vax.md +++ b/gcc/config/vax/vax.md @@ -874,7 +874,7 @@ "* { if (CONST_DOUBLE_HIGH (operands[3])) - operands[3] = gen_rtx (CONST_INT, VOIDmode, CONST_DOUBLE_LOW (operands[3])); + operands[3] = GEN_INT (CONST_DOUBLE_LOW (operands[3])); return \"emul %1,%2,%3,%0\"; }") @@ -956,7 +956,7 @@ } if (GET_CODE (op1) == CONST_INT) - operands[1] = gen_rtx (CONST_INT, VOIDmode, ~INTVAL (op1)); + operands[1] = GEN_INT (~INTVAL (op1)); else operands[1] = expand_unop (SImode, one_cmpl_optab, op1, 0, 1); }") @@ -978,7 +978,7 @@ } if (GET_CODE (op1) == CONST_INT) - operands[1] = gen_rtx (CONST_INT, VOIDmode, 65535 & ~INTVAL (op1)); + operands[1] = GEN_INT (65535 & ~INTVAL (op1)); else operands[1] = expand_unop (HImode, one_cmpl_optab, op1, 0, 1); }") @@ -1000,7 +1000,7 @@ } if (GET_CODE (op1) == CONST_INT) - operands[1] = gen_rtx (CONST_INT, VOIDmode, 255 & ~INTVAL (op1)); + operands[1] = GEN_INT (255 & ~INTVAL (op1)); else operands[1] = expand_unop (QImode, one_cmpl_optab, op1, 0, 1); }") @@ -1847,7 +1847,7 @@ if (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) > 255 * 4) /* Vax `calls' really uses only one byte of #args, so pop explicitly. */ return \"calls $0,%0\;addl2 %1,sp\"; - operands[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) + 3)/ 4); + operands[1] = GEN_INT ((INTVAL (operands[1]) + 3)/ 4); return \"calls %1,%0\"; ") @@ -1862,7 +1862,7 @@ if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) > 255 * 4) /* Vax `calls' really uses only one byte of #args, so pop explicitly. */ return \"calls $0,%1\;addl2 %2,sp\"; - operands[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) + 3)/ 4); + operands[2] = GEN_INT ((INTVAL (operands[2]) + 3)/ 4); return \"calls %2,%1\"; ") @@ -1877,7 +1877,7 @@ if (GET_CODE (operands[1]) != CONST_INT || INTVAL (operands[1]) > 255 * 4) /* Vax `calls' really uses only one byte of #args, so pop explicitly. */ return \"calls $0,%0\;addl2 %1,sp\"; - operands[1] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[1]) + 3)/ 4); + operands[1] = GEN_INT ((INTVAL (operands[1]) + 3)/ 4); return \"calls %1,%0\"; ") @@ -1891,7 +1891,7 @@ if (GET_CODE (operands[2]) != CONST_INT || INTVAL (operands[2]) > 255 * 4) /* Vax `calls' really uses only one byte of #args, so pop explicitly. */ return \"calls $0,%1\;addl2 %2,sp\"; - operands[2] = gen_rtx (CONST_INT, VOIDmode, (INTVAL (operands[2]) + 3)/ 4); + operands[2] = GEN_INT ((INTVAL (operands[2]) + 3)/ 4); return \"calls %2,%1\"; ") @@ -2110,7 +2110,7 @@ unsigned long mask2 = (1 << (32 - INTVAL (operands[2]))) - 1; if ((mask1 & mask2) != mask1) - operands[3] = gen_rtx (CONST_INT, VOIDmode, mask1 & mask2); + operands[3] = GEN_INT (mask1 & mask2); return \"rotl %R2,%1,%0\;bicl2 %N3,%0\"; }") @@ -2128,7 +2128,6 @@ "" "* { - operands[3] = gen_rtx (CONST_INT, VOIDmode, - INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1)); + operands[3] = GEN_INT (INTVAL (operands[3]) & ~((1 << INTVAL (operands[2])) - 1)); return \"rotl %2,%1,%0\;bicl2 %N3,%0\"; }") diff --git a/gcc/config/we32k/we32k.c b/gcc/config/we32k/we32k.c index 3dceb07e8c9..0c02686d703 100644 --- a/gcc/config/we32k/we32k.c +++ b/gcc/config/we32k/we32k.c @@ -1,6 +1,6 @@ /* Subroutines for insn-output.c for AT&T we32000 Family. Contributed by John Wehle (john@feith1.uucp) - Copyright (C) 1991-1992 Free Software Foundation, Inc. + Copyright (C) 1991, 1992, 1997 Free Software Foundation, Inc. This file is part of GNU CC. @@ -20,8 +20,8 @@ the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ -#include <stdio.h> #include "config.h" +#include <stdio.h> #include "rtl.h" #include "real.h" @@ -85,10 +85,8 @@ output_move_double (operands) } else if (GET_CODE (operands[1]) == CONST_DOUBLE) { - lsw_operands[1] = gen_rtx (CONST_INT, SImode, - CONST_DOUBLE_HIGH (operands[1])); - operands[1] = gen_rtx (CONST_INT, SImode, - CONST_DOUBLE_LOW (operands[1])); + lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH (operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW (operands[1])); } else if (GET_CODE (operands[1]) == CONST_INT) { @@ -122,10 +120,8 @@ output_push_double (operands) lsw_operands[0] = adj_offsettable_operand (operands[0], 4); else if (GET_CODE (operands[0]) == CONST_DOUBLE) { - lsw_operands[0] = gen_rtx (CONST_INT, SImode, - CONST_DOUBLE_HIGH (operands[0])); - operands[0] = gen_rtx (CONST_INT, SImode, - CONST_DOUBLE_LOW (operands[0])); + lsw_operands[0] = GEN_INT (CONST_DOUBLE_HIGH (operands[0])); + operands[0] = GEN_INT (CONST_DOUBLE_LOW (operands[0])); } else if (GET_CODE (operands[0]) == CONST_INT) { diff --git a/gcc/config/we32k/we32k.h b/gcc/config/we32k/we32k.h index 8d8593bc26b..07f00107d59 100644 --- a/gcc/config/we32k/we32k.h +++ b/gcc/config/we32k/we32k.h @@ -480,11 +480,11 @@ enum reg_class { NO_REGS, GENERAL_REGS, #define TRAMPOLINE_TEMPLATE(FILE) \ { \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x844f)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x844f)); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ - ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0x48)); \ - ASM_OUTPUT_SHORT (FILE, gen_rtx (CONST_INT, VOIDmode, 0x247f)); \ + ASM_OUTPUT_CHAR (FILE, GEN_INT (0x48)); \ + ASM_OUTPUT_SHORT (FILE, GEN_INT (0x247f)); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ ASM_OUTPUT_SHORT (FILE, const0_rtx); \ } diff --git a/gcc/config/we32k/we32k.md b/gcc/config/we32k/we32k.md index 216b1ff04e2..9d85a1026db 100644 --- a/gcc/config/we32k/we32k.md +++ b/gcc/config/we32k/we32k.md @@ -140,10 +140,8 @@ else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - lsw_operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[2])); - operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[2])); + lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2])); } else if (GET_CODE (operands[2]) == CONST_INT) @@ -192,10 +190,8 @@ else if (GET_CODE (operands[1]) == CONST_DOUBLE) { - lsw_operands[1] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[1])); - operands[1] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[1])); + lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH(operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW(operands[1])); } else if (GET_CODE (operands[1]) == CONST_INT) @@ -214,10 +210,8 @@ else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - lsw_operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[2])); - operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[2])); + lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2])); } else if (GET_CODE (operands[2]) == CONST_INT) @@ -310,10 +304,8 @@ else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - lsw_operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[2])); - operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[2])); + lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2])); } else if (GET_CODE (operands[2]) == CONST_INT) @@ -362,10 +354,8 @@ else if (GET_CODE (operands[1]) == CONST_DOUBLE) { - lsw_operands[1] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[1])); - operands[1] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[1])); + lsw_operands[1] = GEN_INT (CONST_DOUBLE_HIGH(operands[1])); + operands[1] = GEN_INT (CONST_DOUBLE_LOW(operands[1])); } else if (GET_CODE (operands[1]) == CONST_INT) @@ -384,10 +374,8 @@ else if (GET_CODE (operands[2]) == CONST_DOUBLE) { - lsw_operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_HIGH(operands[2])); - operands[2] = gen_rtx(CONST_INT, SImode, - CONST_DOUBLE_LOW(operands[2])); + lsw_operands[2] = GEN_INT (CONST_DOUBLE_HIGH(operands[2])); + operands[2] = GEN_INT (CONST_DOUBLE_LOW(operands[2])); } else if (GET_CODE (operands[2]) == CONST_INT) @@ -770,7 +758,7 @@ if (GET_CODE (operands[1]) == CONST_INT && ((unsigned long)INTVAL (operands[1]) & 0x8000L)) - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) | 0xffff0000L); + operands[1] = GEN_INT (INTVAL(operands[1]) | 0xffff0000L); output_asm_insn(\"CMPH %1, %0\",operands); @@ -786,7 +774,7 @@ if (GET_CODE (operands[1]) == CONST_INT && ((unsigned long)INTVAL (operands[1]) & 0x80L)) - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) | 0xffffff00L); + operands[1] = GEN_INT (INTVAL(operands[1]) | 0xffffff00L); output_asm_insn(\"CMPB {sbyte}%1, {sbyte}%0\",operands); @@ -910,7 +898,7 @@ "* { - operands[2] = gen_rtx(CONST_INT, SImode, INTVAL(operands[2]) - 1); + operands[2] = GEN_INT (INTVAL(operands[2]) - 1); output_asm_insn(\"EXTFW %2, %3, %1, %0\",operands); return \"\"; @@ -925,7 +913,7 @@ "* { - operands[2] = gen_rtx(CONST_INT, SImode, INTVAL(operands[2]) - 1); + operands[2] = GEN_INT (INTVAL(operands[2]) - 1); output_asm_insn(\"EXTFH %2, %3, {uhalf}%1, {uword}%0\",operands); return \"\"; @@ -940,7 +928,7 @@ "* { - operands[2] = gen_rtx(CONST_INT, SImode, INTVAL(operands[2]) - 1); + operands[2] = GEN_INT (INTVAL(operands[2]) - 1); output_asm_insn(\"EXTFB %2, %3, {ubyte}%1, {uword}%0\",operands); return \"\"; @@ -955,7 +943,7 @@ "* { - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) - 1); + operands[1] = GEN_INT (INTVAL(operands[1]) - 1); output_asm_insn(\"INSFW %1, %2, %3, %0\",operands); return \"\"; @@ -970,7 +958,7 @@ "* { - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) - 1); + operands[1] = GEN_INT (INTVAL(operands[1]) - 1); output_asm_insn(\"INSFH %1, %2, {uword}%3, {uhalf}%0\",operands); return \"\"; @@ -985,7 +973,7 @@ "* { - operands[1] = gen_rtx(CONST_INT, SImode, INTVAL(operands[1]) - 1); + operands[1] = GEN_INT (INTVAL(operands[1]) - 1); output_asm_insn(\"INSFB %1, %2, {uword}%3, {ubyte}%0\",operands); return \"\"; diff --git a/gcc/md.texi b/gcc/md.texi index b7c9a5f3722..8ac4d102f30 100644 --- a/gcc/md.texi +++ b/gcc/md.texi @@ -3222,8 +3222,7 @@ on this machine. So it must be copied into a register with (match_dup 2)))] "" "operands[2] - = force_reg (SImode, gen_rtx (CONST_INT, - VOIDmode, 65535)); ") + = force_reg (SImode, GEN_INT (65535)); ") @end smallexample @strong{Note:} If the @code{define_expand} is used to serve a @@ -3354,8 +3353,8 @@ Here is an example of this use of @code{define_split}, taken from if (low & 0x8000) high++, low |= 0xffff0000; - operands[3] = gen_rtx (CONST_INT, VOIDmode, high << 16); - operands[4] = gen_rtx (CONST_INT, VOIDmode, low); + operands[3] = GEN_INT (high << 16); + operands[4] = GEN_INT (low); @}") @end smallexample @@ -3388,8 +3387,8 @@ an equality comparison of a register and a large constant: int sextc = (c << 16) >> 16; int xorv = c ^ sextc; - operands[4] = gen_rtx (CONST_INT, VOIDmode, xorv); - operands[5] = gen_rtx (CONST_INT, VOIDmode, sextc); + operands[4] = GEN_INT (xorv); + operands[5] = GEN_INT (sextc); @}") @end smallexample |