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authornickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4>2004-08-04 13:54:51 +0000
committernickc <nickc@138bc75d-0d04-0410-961f-82ee72b054a4>2004-08-04 13:54:51 +0000
commit90b0414cbc5cef048c8460ac715ac933fcc4c16b (patch)
tree717c4742c888098f9a2cf7f4170b47c224ecd0ad
parent2e95675c2290b2c5f647235fe23ed329c5315a14 (diff)
downloadgcc-90b0414cbc5cef048c8460ac715ac933fcc4c16b.tar.gz
config/sh/sh.h (TARGET_SWITCHES): Add no-renesas to select the GCC ABI.
doc/invoke.texi: Document this new switch and also the -mrenesas switch. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@85557 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/sh/sh.h1
-rw-r--r--gcc/doc/invoke.texi12
3 files changed, 19 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c6ee6602cea..8cb721f5dfe 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2004-08-04 Nick Clifton <nickc@redhat.com>
+
+ * config/sh/sh.h (TARGET_SWITCHES): Add no-renesas to select the
+ GCC ABI.
+ * doc/invoke.texi: Document this new switch and also the -mrenesas
+ switch.
+
2004-08-04 Nathan Sidwell <nathan@codesourcery.com>
* cfglayout.c (insn_locators_initialize): Update the current
diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h
index 276bd1e1101..15c19ad0ab7 100644
--- a/gcc/config/sh/sh.h
+++ b/gcc/config/sh/sh.h
@@ -561,6 +561,7 @@ extern int target_flags;
{"fmovd", FMOVD_BIT, "" }, \
{"hitachi", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \
{"renesas", HITACHI_BIT, "Follow Renesas (formerly Hitachi) / SuperH calling conventions" }, \
+ {"no-renesas",-HITACHI_BIT,"Follow the GCC calling conventions" }, \
{"nomacsave", NOMACSAVE_BIT, "Mark MAC register as call-clobbered" }, \
{"ieee", IEEE_BIT, "Increase the IEEE compliance for floating-point code" }, \
{"isize", ISIZE_BIT, "" }, \
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ce26d58181f..6332839e070 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -626,7 +626,7 @@ See RS/6000 and PowerPC Options.
-m5-32media -m5-32media-nofpu @gol
-m5-compact -m5-compact-nofpu @gol
-mb -ml -mdalign -mrelax @gol
--mbigtable -mfmovd -mhitachi -mnomacsave @gol
+-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol
-mieee -misize -mpadstruct -mspace @gol
-mprefergot -musermode}
@@ -10585,6 +10585,16 @@ Enable the use of the instruction @code{fmovd}.
@opindex mhitachi
Comply with the calling conventions defined by Renesas.
+@item -mrenesas
+@opindex mhitachi
+Comply with the calling conventions defined by Renesas.
+
+@item -mno-renesas
+@opindex mhitachi
+Comply with the calling conventions defined for GCC before the Renesas
+conventions were available. This option is the default for all
+targets of the SH toolchain except for @samp{sh-symbianelf}.
+
@item -mnomacsave
@opindex mnomacsave
Mark the @code{MAC} register as call-clobbered, even if