diff options
| author | kyukhin <kyukhin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-10-06 13:49:30 +0000 |
|---|---|---|
| committer | kyukhin <kyukhin@138bc75d-0d04-0410-961f-82ee72b054a4> | 2015-10-06 13:49:30 +0000 |
| commit | e6007a65f96422117a50faeb67a5ec9b93c51f48 (patch) | |
| tree | 945fad2c44a68ba416b5bd952c21bbc5c62aca3f | |
| parent | 6e227659adfcd93abb251766610430760bf2ad52 (diff) | |
| download | gcc-e6007a65f96422117a50faeb67a5ec9b93c51f48.tar.gz | |
AVX-512. Avoid upper-bank registers when splitting vec_extract_lo instruction.
gcc/
PR target/67849
* config/i386/sse.md (define_split vec_select/V8FI): Restrict
split for upper-bank registers when target does not support
AVX512VL.
(define_insn "vec_extract_lo_<mode><mask_name>"): Restrict
split when target does not support AVX512VL.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228525 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 12 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 5 |
2 files changed, 14 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d8e7a86a89b..75de0c94c28 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,9 +1,18 @@ +2015-10-06 Alexander Fomin <alexander.fomin@intel.com> + + PR target/67849 + * config/i386/sse.md (define_split vec_select/V8FI): Restrict + split for upper-bank registers when target does not support + AVX512VL. + (define_insn "vec_extract_lo_<mode><mask_name>"): Restrict + split when target does not support AVX512VL. + 2015-10-06 David Edelsohn <dje.gcc@gmail.com> PR c/65345 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Adjust to use create_tmp_var_raw instead of create_tmp_var. - + 2015-10-06 Nick Clifton <nickc@redhat.com> * config/rl78/rl78.c (rl78_rtx_costs): Improve cost estimates for @@ -596,6 +605,7 @@ readability. 2015-10-02 Kirill Yukhin <kirill.yukhin@intel.com> + * config/i386/i386.c (processor_features): Add F_AVX512VBMI, F_AVX512IFMA. (isa_names_table): Handle F_AVX512VBMI and F_AVX512IFMA. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 311bf3fe45a..e5680f1939c 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -6926,7 +6926,8 @@ (parallel [(const_int 0) (const_int 1) (const_int 2) (const_int 3)])))] "TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1])) - && reload_completed" + && reload_completed + && (TARGET_AVX512VL || (REG_P (operands[0]) && !EXT_REX_SSE_REG_P (operands[1])))" [(const_int 0)] { rtx op1 = operands[1]; @@ -6964,7 +6965,7 @@ (const_int 2) (const_int 3)])))] "TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1]))" { - if (<mask_applied>) + if (<mask_applied> || !TARGET_AVX512VL) return "vextract<shuffletype>64x4\t{$0x0, %1, %0<mask_operand2>|%0<mask_operand2>, %1, 0x0}"; else return "#"; |