summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorbernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4>2011-12-20 16:46:22 +0000
committerbernds <bernds@138bc75d-0d04-0410-961f-82ee72b054a4>2011-12-20 16:46:22 +0000
commit941a2396e3d2af2d96a31e670b913c4331bee05b (patch)
treed0a86f6d0ca1212b434d7c1b46b1acf3cc04c3b6
parenta3248fc4f63a569631daa30af5755c26cf0cdc93 (diff)
downloadgcc-941a2396e3d2af2d96a31e670b913c4331bee05b.tar.gz
gcc/
* expr.c (store_field): Avoid a direct store if the mode is larger than the size of the bit field. * stor-layout.c (layout_decl): If flag_strict_volatile_bitfields, treat non-volatile bit fields like volatile ones. * toplev.c (process_options): Disallow combination of -fstrict-volatile-bitfields and ABI versions less than 2. * config/arm/arm.c (arm_option_override): Don't enable flag_strict_volatile_bitfields if the ABI version is less than 2. * config/h8300/h8300.c (h8300_option_override): Likewise. * config/rx/rx.c (rx_option_override): Likewise. * config/m32c/m32c.c (m32c_option_override): Likewise. * config/sh/sh.c (sh_option_override): Likewise. gcc/testsuite/ * gcc.target/arm/volatile-bitfields-4.c: New test. * c-c++-common/abi-bf.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@182545 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog16
-rw-r--r--gcc/config/arm/arm.c3
-rw-r--r--gcc/config/h8300/h8300.c2
-rw-r--r--gcc/config/m32c/m32c.c2
-rw-r--r--gcc/config/rx/rx.c2
-rw-r--r--gcc/config/sh/sh.c2
-rw-r--r--gcc/expr.c2
-rw-r--r--gcc/stor-layout.c7
-rw-r--r--gcc/testsuite/ChangeLog6
-rw-r--r--gcc/testsuite/c-c++-common/abi-bf.c3
-rw-r--r--gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c30
-rw-r--r--gcc/toplev.c7
12 files changed, 74 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2dd1cc00b25..dc47ebeece0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,19 @@
+2011-12-20 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR middle-end/51200
+ * expr.c (store_field): Avoid a direct store if the mode is larger
+ than the size of the bit field.
+ * stor-layout.c (layout_decl): If flag_strict_volatile_bitfields,
+ treat non-volatile bit fields like volatile ones.
+ * toplev.c (process_options): Disallow combination of
+ -fstrict-volatile-bitfields and ABI versions less than 2.
+ * config/arm/arm.c (arm_option_override): Don't enable
+ flag_strict_volatile_bitfields if the ABI version is less than 2.
+ * config/h8300/h8300.c (h8300_option_override): Likewise.
+ * config/rx/rx.c (rx_option_override): Likewise.
+ * config/m32c/m32c.c (m32c_option_override): Likewise.
+ * config/sh/sh.c (sh_option_override): Likewise.
+
2011-12-20 Richard Guenther <rguenther@suse.de>
PR lto/46796
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 3d3c4523c75..b6d619ee738 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1989,7 +1989,8 @@ arm_option_override (void)
global_options_set.x_param_values);
/* ARM EABI defaults to strict volatile bitfields. */
- if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0)
+ if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0
+ && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
/* Enable sw prefetching at -O3 for CPUS that have prefetch, and we have deemed
diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c
index c5603934372..3911cd4dda4 100644
--- a/gcc/config/h8300/h8300.c
+++ b/gcc/config/h8300/h8300.c
@@ -409,7 +409,7 @@ h8300_option_override (void)
}
/* This target defaults to strict volatile bitfields. */
- if (flag_strict_volatile_bitfields < 0)
+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
}
diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 04f69050609..d86a618b028 100644
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -417,7 +417,7 @@ m32c_option_override (void)
flag_ivopts = 0;
/* This target defaults to strict volatile bitfields. */
- if (flag_strict_volatile_bitfields < 0)
+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
/* r8c/m16c have no 16-bit indirect call, so thunks are involved.
diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c
index c9720eb3e15..4a73285b338 100644
--- a/gcc/config/rx/rx.c
+++ b/gcc/config/rx/rx.c
@@ -2571,7 +2571,7 @@ rx_option_override (void)
}
/* This target defaults to strict volatile bitfields. */
- if (flag_strict_volatile_bitfields < 0)
+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
rx_override_options_after_change ();
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index b9834fb5c9f..1b289ad29d3 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -842,7 +842,7 @@ sh_option_override (void)
sh_fix_range (sh_fixed_range_str);
/* This target defaults to strict volatile bitfields. */
- if (flag_strict_volatile_bitfields < 0)
+ if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
flag_strict_volatile_bitfields = 1;
}
diff --git a/gcc/expr.c b/gcc/expr.c
index aa78468a96b..5747a1709ee 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -6327,6 +6327,8 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
|| bitpos % GET_MODE_ALIGNMENT (mode))
&& SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
|| (bitpos % BITS_PER_UNIT != 0)))
+ || (bitsize >= 0 && mode != BLKmode
+ && GET_MODE_BITSIZE (mode) > bitsize)
/* If the RHS and field are a constant size and the size of the
RHS isn't the same size as the bitfield, we must use bitfield
operations. */
diff --git a/gcc/stor-layout.c b/gcc/stor-layout.c
index 359541e02df..35320c2fad9 100644
--- a/gcc/stor-layout.c
+++ b/gcc/stor-layout.c
@@ -622,12 +622,13 @@ layout_decl (tree decl, unsigned int known_align)
/* See if we can use an ordinary integer mode for a bit-field.
Conditions are: a fixed size that is correct for another mode,
occupying a complete byte or bytes on proper boundary,
- and not volatile or not -fstrict-volatile-bitfields. */
+ and not -fstrict-volatile-bitfields. If the latter is set,
+ we unfortunately can't check TREE_THIS_VOLATILE, as a cast
+ may make a volatile object later. */
if (TYPE_SIZE (type) != 0
&& TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
&& GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT
- && !(TREE_THIS_VOLATILE (decl)
- && flag_strict_volatile_bitfields > 0))
+ && flag_strict_volatile_bitfields <= 0)
{
enum machine_mode xmode
= mode_for_size_tree (DECL_SIZE (decl), MODE_INT, 1);
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0f947a944f0..8cb5093cb64 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2011-12-20 Bernd Schmidt <bernds@codesourcery.com>
+
+ PR middle-end/51200
+ * gcc.target/arm/volatile-bitfields-4.c: New test.
+ * c-c++-common/abi-bf.c: New test.
+
2011-12-20 Dodji Seketeli <dodji@redhat.com>
PR debug/49951
diff --git a/gcc/testsuite/c-c++-common/abi-bf.c b/gcc/testsuite/c-c++-common/abi-bf.c
new file mode 100644
index 00000000000..05b898609c2
--- /dev/null
+++ b/gcc/testsuite/c-c++-common/abi-bf.c
@@ -0,0 +1,3 @@
+/* { dg-warning "incompatible" } */
+/* { dg-do compile } */
+/* { dg-options "-fstrict-volatile-bitfields -fabi-version=1" } */
diff --git a/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c b/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
new file mode 100644
index 00000000000..805dab16428
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c
@@ -0,0 +1,30 @@
+/* { dg-require-effective-target arm_eabi } */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-times "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */
+/* { dg-final { scan-assembler-times "str\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */
+/* { dg-final { scan-assembler-not "strb" } } */
+
+struct thing {
+ unsigned a: 8;
+ unsigned b: 8;
+ unsigned c: 8;
+ unsigned d: 8;
+};
+
+struct thing2 {
+ volatile unsigned a: 8;
+ volatile unsigned b: 8;
+ volatile unsigned c: 8;
+ volatile unsigned d: 8;
+};
+
+void test1(volatile struct thing *t)
+{
+ t->a = 5;
+}
+
+void test2(struct thing2 *t)
+{
+ t->a = 5;
+}
diff --git a/gcc/toplev.c b/gcc/toplev.c
index 766aa9917c3..efce98fa30f 100644
--- a/gcc/toplev.c
+++ b/gcc/toplev.c
@@ -1330,6 +1330,13 @@ process_options (void)
flag_ira_region
= optimize_size || !optimize ? IRA_REGION_ONE : IRA_REGION_MIXED;
+ if (flag_strict_volatile_bitfields > 0 && !abi_version_at_least (2))
+ {
+ warning (0, "-fstrict-volatile-bitfield disabled; "
+ "it is incompatible with ABI versions < 2");
+ flag_strict_volatile_bitfields = 0;
+ }
+
/* Unrolling all loops implies that standard loop unrolling must also
be done. */
if (flag_unroll_all_loops)