diff options
author | jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-10-20 14:31:03 +0000 |
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committer | jakub <jakub@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-10-20 14:31:03 +0000 |
commit | 9b8698ff04baf7205264b7e3ca4ff256f5b2ad56 (patch) | |
tree | edea93b23d066c0adb91a17764b8bb6343ba03ab | |
parent | d2de46d402c7684efbed0f6b5b0e31d17a0df867 (diff) | |
download | gcc-9b8698ff04baf7205264b7e3ca4ff256f5b2ad56.tar.gz |
* config/i386/i386.md (isa): Remove fma_avx512f.
* config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>,
<avx512>_fmadd_<mode>_mask3<round_name>,
<avx512>_fmsub_<mode>_mask<round_name>,
<avx512>_fmsub_<mode>_mask3<round_name>,
<avx512>_fnmadd_<mode>_mask<round_name>,
<avx512>_fnmadd_<mode>_mask3<round_name>,
<avx512>_fnmsub_<mode>_mask<round_name>,
<avx512>_fnmsub_<mode>_mask3<round_name>,
<avx512>_fmaddsub_<mode>_mask<round_name>,
<avx512>_fmaddsub_<mode>_mask3<round_name>,
<avx512>_fmsubadd_<mode>_mask<round_name>,
<avx512>_fmsubadd_<mode>_mask3<round_name>): Remove isa attribute.
(*vec_widen_umult_even_v16si<mask_name>,
*vec_widen_smult_even_v16si<mask_name>): Likewise.
(<mask_codefor>avx512bw_dbpsadbw<mode><mask_name>): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@253939 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 19 | ||||
-rw-r--r-- | gcc/config/i386/i386.md | 4 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 45 |
3 files changed, 35 insertions, 33 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 42fc979fcf1..1274635d19d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,22 @@ +2017-10-20 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.md (isa): Remove fma_avx512f. + * config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>, + <avx512>_fmadd_<mode>_mask3<round_name>, + <avx512>_fmsub_<mode>_mask<round_name>, + <avx512>_fmsub_<mode>_mask3<round_name>, + <avx512>_fnmadd_<mode>_mask<round_name>, + <avx512>_fnmadd_<mode>_mask3<round_name>, + <avx512>_fnmsub_<mode>_mask<round_name>, + <avx512>_fnmsub_<mode>_mask3<round_name>, + <avx512>_fmaddsub_<mode>_mask<round_name>, + <avx512>_fmaddsub_<mode>_mask3<round_name>, + <avx512>_fmsubadd_<mode>_mask<round_name>, + <avx512>_fmsubadd_<mode>_mask3<round_name>): Remove isa attribute. + (*vec_widen_umult_even_v16si<mask_name>, + *vec_widen_smult_even_v16si<mask_name>): Likewise. + (<mask_codefor>avx512bw_dbpsadbw<mode><mask_name>): Likewise. + 2017-10-20 Igor Tsimbalist <igor.v.tsimbalist@intel.com> * extend.texi: Add 'nocf_check' documentation. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index d9097211713..8c576a2e036 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -798,7 +798,7 @@ (define_attr "isa" "base,x64,x64_sse4,x64_sse4_noavx,x64_avx,nox64, sse2,sse2_noavx,sse3,sse4,sse4_noavx,avx,noavx, avx2,noavx2,bmi,bmi2,fma4,fma,avx512f,noavx512f, - fma_avx512f,avx512bw,noavx512bw,avx512dq,noavx512dq, + avx512bw,noavx512bw,avx512dq,noavx512dq, avx512vl,noavx512vl,x64_avx512dq,x64_avx512bw" (const_string "base")) @@ -832,8 +832,6 @@ (eq_attr "isa" "fma") (symbol_ref "TARGET_FMA") (eq_attr "isa" "avx512f") (symbol_ref "TARGET_AVX512F") (eq_attr "isa" "noavx512f") (symbol_ref "!TARGET_AVX512F") - (eq_attr "isa" "fma_avx512f") - (symbol_ref "TARGET_FMA || TARGET_AVX512F") (eq_attr "isa" "avx512bw") (symbol_ref "TARGET_AVX512BW") (eq_attr "isa" "noavx512bw") (symbol_ref "!TARGET_AVX512BW") (eq_attr "isa" "avx512dq") (symbol_ref "TARGET_AVX512DQ") diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 2ddd2970eeb..35e4bc95c4a 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -3713,8 +3713,7 @@ "@ vfmadd132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>} vfmadd213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}" - [(set_attr "isa" "fma_avx512f,fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "<avx512>_fmadd_<mode>_mask3<round_name>" @@ -3728,8 +3727,7 @@ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512F" "vfmadd231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}" - [(set_attr "isa" "fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "*fma_fmsub_<mode>" @@ -3779,8 +3777,7 @@ "@ vfmsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>} vfmsub213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}" - [(set_attr "isa" "fma_avx512f,fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "<avx512>_fmsub_<mode>_mask3<round_name>" @@ -3795,8 +3792,7 @@ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512F && <round_mode512bit_condition>" "vfmsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}" - [(set_attr "isa" "fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "*fma_fnmadd_<mode>" @@ -3846,8 +3842,7 @@ "@ vfnmadd132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>} vfnmadd213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}" - [(set_attr "isa" "fma_avx512f,fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "<avx512>_fnmadd_<mode>_mask3<round_name>" @@ -3862,8 +3857,7 @@ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512F && <round_mode512bit_condition>" "vfnmadd231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}" - [(set_attr "isa" "fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "*fma_fnmsub_<mode>" @@ -3916,8 +3910,7 @@ "@ vfnmsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>} vfnmsub213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}" - [(set_attr "isa" "fma_avx512f,fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "<avx512>_fnmsub_<mode>_mask3<round_name>" @@ -3933,8 +3926,7 @@ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512F" "vfnmsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}" - [(set_attr "isa" "fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) ;; FMA parallel floating point multiply addsub and subadd operations. @@ -4018,8 +4010,7 @@ "@ vfmaddsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>} vfmaddsub213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}" - [(set_attr "isa" "fma_avx512f,fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "<avx512>_fmaddsub_<mode>_mask3<round_name>" @@ -4034,8 +4025,7 @@ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512F" "vfmaddsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}" - [(set_attr "isa" "fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "*fma_fmsubadd_<mode>" @@ -4088,8 +4078,7 @@ "@ vfmsubadd132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>} vfmsubadd213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}" - [(set_attr "isa" "fma_avx512f,fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) (define_insn "<avx512>_fmsubadd_<mode>_mask3<round_name>" @@ -4105,8 +4094,7 @@ (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))] "TARGET_AVX512F" "vfmsubadd231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}" - [(set_attr "isa" "fma_avx512f") - (set_attr "type" "ssemuladd") + [(set_attr "type" "ssemuladd") (set_attr "mode" "<MODE>")]) ;; FMA3 floating point scalar intrinsics. These merge result with @@ -10181,8 +10169,7 @@ (const_int 12) (const_int 14)])))))] "TARGET_AVX512F && ix86_binary_operator_ok (MULT, V16SImode, operands)" "vpmuludq\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}" - [(set_attr "isa" "avx512f") - (set_attr "type" "sseimul") + [(set_attr "type" "sseimul") (set_attr "prefix_extra" "1") (set_attr "prefix" "evex") (set_attr "mode" "XI")]) @@ -10298,8 +10285,7 @@ (const_int 12) (const_int 14)])))))] "TARGET_AVX512F && ix86_binary_operator_ok (MULT, V16SImode, operands)" "vpmuldq\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}" - [(set_attr "isa" "avx512f") - (set_attr "type" "sseimul") + [(set_attr "type" "sseimul") (set_attr "prefix_extra" "1") (set_attr "prefix" "evex") (set_attr "mode" "XI")]) @@ -19630,8 +19616,7 @@ UNSPEC_DBPSADBW))] "TARGET_AVX512BW" "vdbpsadbw\t{%3, %2, %1, %0<mask_operand4>|%0<mask_operand4>, %1, %2, %3}" - [(set_attr "isa" "avx") - (set_attr "type" "sselog1") + [(set_attr "type" "sselog1") (set_attr "length_immediate" "1") (set_attr "prefix" "evex") (set_attr "mode" "<sseinsnmode>")]) |