[gcc]

2017-10-09  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/amo.h: New include file to provide ISA 3.0 atomic
	memory operation instruction support.
	* config.gcc (powerpc*-*-*): Include amo.h as an extra header.
	(rs6000-ibm-aix[789]*): Likewise.
	* doc/extend.texi (PowerPC Atomic Memory Operation Functions):
	Document new functions.

[gcc/testsuite]
2017-10-09  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* gcc.target/powerpc/amo1.c: New test.
	* gcc.target/powerpc/amo2.c: Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@253552 138bc75d-0d04-0410-961f-82ee72b054a4

6 files changed, 452 insertions, 1 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 26e60631301..4f56637b6d8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2017-10-09  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	* config/rs6000/amo.h: New include file to provide ISA 3.0 atomic
+	memory operation instruction support.
+	* config.gcc (powerpc*-*-*): Include amo.h as an extra header.
+	(rs6000-ibm-aix[789]*): Likewise.
+	* doc/extend.texi (PowerPC Atomic Memory Operation Functions):
+	Document new functions.
+
 2017-10-09  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/82397
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 91a55e89d04..ee92f70904a 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -461,6 +461,7 @@ powerpc*-*-*)
 	extra_headers="${extra_headers} mmintrin.h x86intrin.h"
 	extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
 	extra_headers="${extra_headers} paired.h"
+	extra_headers="${extra_headers} amo.h"
 	case x$with_cpu in
 	    xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
 		cpu_is_64bit=yes
@@ -2627,7 +2628,7 @@ rs6000-ibm-aix[789].* | powerpc-ibm-aix[789].*)
 	use_collect2=yes
 	thread_file='aix'
 	use_gcc_stdint=wrap
-	extra_headers=altivec.h
+	extra_headers="altivec.h amo.h"
 	default_use_cxa_atexit=yes
 	;;
 rl78-*-elf*)
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 4156291b642..0014490e869 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -12041,6 +12041,7 @@ instructions, but allow the compiler to schedule those calls.
 * PowerPC Built-in Functions::
 * PowerPC AltiVec/VSX Built-in Functions::
 * PowerPC Hardware Transactional Memory Built-in Functions::
+* PowerPC Atomic Memory Operation Functions::
 * RX Built-in Functions::
 * S/390 System z Built-in Functions::
 * SH Built-in Functions::
@@ -19126,6 +19127,67 @@ while (1)
   @}
 @end smallexample
 
+@node PowerPC Atomic Memory Operation Functions
+@subsection PowerPC Atomic Memory Operation Functions
+ISA 3.0 of the PowerPC added new atomic memory operation (amo)
+instructions.  GCC provides support for these instructions in 64-bit
+environments.  All of the functions are declared in the include file
+@code{amo.h}.
+
+The functions supported are:
+
+@smallexample
+#include <amo.h>
+
+uint32_t amo_lwat_add (uint32_t *, uint32_t);
+uint32_t amo_lwat_xor (uint32_t *, uint32_t);
+uint32_t amo_lwat_ior (uint32_t *, uint32_t);
+uint32_t amo_lwat_and (uint32_t *, uint32_t);
+uint32_t amo_lwat_umax (uint32_t *, uint32_t);
+uint32_t amo_lwat_umin (uint32_t *, uint32_t);
+uint32_t amo_lwat_swap (uint32_t *, uint32_t);
+
+int32_t amo_lwat_sadd (int32_t *, int32_t);
+int32_t amo_lwat_smax (int32_t *, int32_t);
+int32_t amo_lwat_smin (int32_t *, int32_t);
+int32_t amo_lwat_sswap (int32_t *, int32_t);
+
+uint64_t amo_ldat_add (uint64_t *, uint64_t);
+uint64_t amo_ldat_xor (uint64_t *, uint64_t);
+uint64_t amo_ldat_ior (uint64_t *, uint64_t);
+uint64_t amo_ldat_and (uint64_t *, uint64_t);
+uint64_t amo_ldat_umax (uint64_t *, uint64_t);
+uint64_t amo_ldat_umin (uint64_t *, uint64_t);
+uint64_t amo_ldat_swap (uint64_t *, uint64_t);
+
+int64_t amo_ldat_sadd (int64_t *, int64_t);
+int64_t amo_ldat_smax (int64_t *, int64_t);
+int64_t amo_ldat_smin (int64_t *, int64_t);
+int64_t amo_ldat_sswap (int64_t *, int64_t);
+
+void amo_stwat_add (uint32_t *, uint32_t);
+void amo_stwat_xor (uint32_t *, uint32_t);
+void amo_stwat_ior (uint32_t *, uint32_t);
+void amo_stwat_and (uint32_t *, uint32_t);
+void amo_stwat_umax (uint32_t *, uint32_t);
+void amo_stwat_umin (uint32_t *, uint32_t);
+
+void amo_stwat_sadd (int32_t *, int32_t);
+void amo_stwat_smax (int32_t *, int32_t);
+void amo_stwat_smin (int32_t *, int32_t);
+
+void amo_stdat_add (uint64_t *, uint64_t);
+void amo_stdat_xor (uint64_t *, uint64_t);
+void amo_stdat_ior (uint64_t *, uint64_t);
+void amo_stdat_and (uint64_t *, uint64_t);
+void amo_stdat_umax (uint64_t *, uint64_t);
+void amo_stdat_umin (uint64_t *, uint64_t);
+
+void amo_stdat_sadd (int64_t *, int64_t);
+void amo_stdat_smax (int64_t *, int64_t);
+void amo_stdat_smin (int64_t *, int64_t);
+@end smallexample
+
 @node RX Built-in Functions
 @subsection RX Built-in Functions
 GCC supports some of the RX instructions which cannot be expressed in
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5768f4260ea..eb88b21c431 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-10-09  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+	* gcc.target/powerpc/amo1.c: New test.
+	* gcc.target/powerpc/amo2.c: Likewise.
+
 2017-10-09  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/82449
diff --git a/gcc/testsuite/gcc.target/powerpc/amo1.c b/gcc/testsuite/gcc.target/powerpc/amo1.c
new file mode 100644
index 00000000000..152f0e5874b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/amo1.c
@@ -0,0 +1,253 @@
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mpower9-vector -mpower9-misc -O2" } */
+
+/* Verify P9 atomic memory operations.  */
+
+#include <amo.h>
+#include <stdint.h>
+
+uint32_t
+do_lw_add (uint32_t *mem, uint32_t value)
+{
+  return amo_lwat_add (mem, value);
+}
+
+int32_t
+do_lw_sadd (int32_t *mem, int32_t value)
+{
+  return amo_lwat_sadd (mem, value);
+}
+
+uint32_t
+do_lw_xor (uint32_t *mem, uint32_t value)
+{
+  return amo_lwat_xor (mem, value);
+}
+
+uint32_t
+do_lw_ior (uint32_t *mem, uint32_t value)
+{
+  return amo_lwat_ior (mem, value);
+}
+
+uint32_t
+do_lw_and (uint32_t *mem, uint32_t value)
+{
+  return amo_lwat_and (mem, value);
+}
+
+uint32_t
+do_lw_umax (uint32_t *mem, uint32_t value)
+{
+  return amo_lwat_umax (mem, value);
+}
+
+int32_t
+do_lw_smax (int32_t *mem, int32_t value)
+{
+  return amo_lwat_smax (mem, value);
+}
+
+uint32_t
+do_lw_umin (uint32_t *mem, uint32_t value)
+{
+  return amo_lwat_umin (mem, value);
+}
+
+int32_t
+do_lw_smin (int32_t *mem, int32_t value)
+{
+  return amo_lwat_smin (mem, value);
+}
+
+uint32_t
+do_lw_swap (uint32_t *mem, uint32_t value)
+{
+  return amo_lwat_swap (mem, value);
+}
+
+int32_t
+do_lw_sswap (int32_t *mem, int32_t value)
+{
+  return amo_lwat_sswap (mem, value);
+}
+
+uint64_t
+do_ld_add (uint64_t *mem, uint64_t value)
+{
+  return amo_ldat_add (mem, value);
+}
+
+int64_t
+do_ld_sadd (int64_t *mem, int64_t value)
+{
+  return amo_ldat_sadd (mem, value);
+}
+
+uint64_t
+do_ld_xor (uint64_t *mem, uint64_t value)
+{
+  return amo_ldat_xor (mem, value);
+}
+
+uint64_t
+do_ld_ior (uint64_t *mem, uint64_t value)
+{
+  return amo_ldat_ior (mem, value);
+}
+
+uint64_t
+do_ld_and (uint64_t *mem, uint64_t value)
+{
+  return amo_ldat_and (mem, value);
+}
+
+uint64_t
+do_ld_umax (uint64_t *mem, uint64_t value)
+{
+  return amo_ldat_umax (mem, value);
+}
+
+int64_t
+do_ld_smax (int64_t *mem, int64_t value)
+{
+  return amo_ldat_smax (mem, value);
+}
+
+uint64_t
+do_ld_umin (uint64_t *mem, uint64_t value)
+{
+  return amo_ldat_umin (mem, value);
+}
+
+int64_t
+do_ld_smin (int64_t *mem, int64_t value)
+{
+  return amo_ldat_smin (mem, value);
+}
+
+uint64_t
+do_ld_swap (uint64_t *mem, uint64_t value)
+{
+  return amo_ldat_swap (mem, value);
+}
+
+int64_t
+do_ld_sswap (int64_t *mem, int64_t value)
+{
+  return amo_ldat_sswap (mem, value);
+}
+
+void
+do_sw_add (uint32_t *mem, uint32_t value)
+{
+  amo_stwat_add (mem, value);
+}
+
+void
+do_sw_sadd (int32_t *mem, int32_t value)
+{
+  amo_stwat_sadd (mem, value);
+}
+
+void
+do_sw_xor (uint32_t *mem, uint32_t value)
+{
+  amo_stwat_xor (mem, value);
+}
+
+void
+do_sw_ior (uint32_t *mem, uint32_t value)
+{
+  amo_stwat_ior (mem, value);
+}
+
+void
+do_sw_and (uint32_t *mem, uint32_t value)
+{
+  amo_stwat_and (mem, value);
+}
+
+void
+do_sw_umax (int32_t *mem, int32_t value)
+{
+  amo_stwat_umax (mem, value);
+}
+
+void
+do_sw_smax (int32_t *mem, int32_t value)
+{
+  amo_stwat_smax (mem, value);
+}
+
+void
+do_sw_umin (int32_t *mem, int32_t value)
+{
+  amo_stwat_umin (mem, value);
+}
+
+void
+do_sw_smin (int32_t *mem, int32_t value)
+{
+  amo_stwat_smin (mem, value);
+}
+
+void
+do_sd_add (uint64_t *mem, uint64_t value)
+{
+  amo_stdat_add (mem, value);
+}
+
+void
+do_sd_sadd (int64_t *mem, int64_t value)
+{
+  amo_stdat_sadd (mem, value);
+}
+
+void
+do_sd_xor (uint64_t *mem, uint64_t value)
+{
+  amo_stdat_xor (mem, value);
+}
+
+void
+do_sd_ior (uint64_t *mem, uint64_t value)
+{
+  amo_stdat_ior (mem, value);
+}
+
+void
+do_sd_and (uint64_t *mem, uint64_t value)
+{
+  amo_stdat_and (mem, value);
+}
+
+void
+do_sd_umax (int64_t *mem, int64_t value)
+{
+  amo_stdat_umax (mem, value);
+}
+
+void
+do_sd_smax (int64_t *mem, int64_t value)
+{
+  amo_stdat_smax (mem, value);
+}
+
+void
+do_sd_umin (int64_t *mem, int64_t value)
+{
+  amo_stdat_umin (mem, value);
+}
+
+void
+do_sd_smin (int64_t *mem, int64_t value)
+{
+  amo_stdat_smin (mem, value);
+}
+
+/* { dg-final { scan-assembler-times {\mldat\M}  11 } } */
+/* { dg-final { scan-assembler-times {\mlwat\M}  11 } } */
+/* { dg-final { scan-assembler-times {\mstdat\M}  9 } } */
+/* { dg-final { scan-assembler-times {\mstwat\M}  9 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/amo2.c b/gcc/testsuite/gcc.target/powerpc/amo2.c
new file mode 100644
index 00000000000..cc7cfe4b450
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/amo2.c
@@ -0,0 +1,121 @@
+/* { dg-do run { target { powerpc*-*-linux* && { lp64 && p9vector_hw } } } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-O2 -mpower9-vector -mpower9-misc" } */
+
+#include <amo.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+/* Test whether the ISA 3.0 amo (atomic memory operations) functions perform as
+   expected.  */
+
+/* 32-bit tests.  */
+static uint32_t u32_ld[4] = {
+  9,				/* add */
+  7,				/* xor */
+  6,				/* ior */
+  7,				/* and */
+};
+
+static uint32_t u32_st[4] = {
+  9,				/* add */
+  7,				/* xor */
+  6,				/* ior */
+  7,				/* and */
+};
+
+static uint32_t u32_result[4];
+
+static uint32_t u32_update[4] = {
+  9 + 1,			/* add */
+  7 ^ 1,			/* xor */
+  6 | 1,			/* ior */
+  7 & 1,			/* and */
+};
+
+static uint32_t u32_prev[4] = {
+  9,				/* add */
+  7,				/* xor */
+  6,				/* ior */
+  7,				/* and */
+};
+
+/* 64-bit tests.  */
+static uint64_t u64_ld[4] = {
+  9,				/* add */
+  7,				/* xor */
+  6,				/* ior */
+  7,				/* and */
+};
+
+static uint64_t u64_st[4] = {
+  9,				/* add */
+  7,				/* xor */
+  6,				/* ior */
+  7,				/* and */
+};
+
+static uint64_t u64_result[4];
+
+static uint64_t u64_update[4] = {
+  9 + 1,			/* add */
+  7 ^ 1,			/* xor */
+  6 | 1,			/* ior */
+  7 & 1,			/* and */
+};
+
+static uint64_t u64_prev[4] = {
+  9,				/* add */
+  7,				/* xor */
+  6,				/* ior */
+  7,				/* and */
+};
+
+int
+main (void)
+{
+  size_t i;
+
+  u32_result[0] = amo_lwat_add (&u32_ld[0], 1);
+  u32_result[1] = amo_lwat_xor (&u32_ld[1], 1);
+  u32_result[2] = amo_lwat_ior (&u32_ld[2], 1);
+  u32_result[3] = amo_lwat_and (&u32_ld[3], 1);
+
+  u64_result[0] = amo_ldat_add (&u64_ld[0], 1);
+  u64_result[1] = amo_ldat_xor (&u64_ld[1], 1);
+  u64_result[2] = amo_ldat_ior (&u64_ld[2], 1);
+  u64_result[3] = amo_ldat_and (&u64_ld[3], 1);
+
+  amo_stwat_add (&u32_st[0], 1);
+  amo_stwat_xor (&u32_st[1], 1);
+  amo_stwat_ior (&u32_st[2], 1);
+  amo_stwat_and (&u32_st[3], 1);
+
+  amo_stdat_add (&u64_st[0], 1);
+  amo_stdat_xor (&u64_st[1], 1);
+  amo_stdat_ior (&u64_st[2], 1);
+  amo_stdat_and (&u64_st[3], 1);
+
+  for (i = 0; i < 4; i++)
+    {
+      if (u32_result[i] != u32_prev[i])
+	abort ();
+
+      if (u32_ld[i] != u32_update[i])
+	abort ();
+
+      if (u32_st[i] != u32_update[i])
+	abort ();
+
+      if (u64_result[i] != u64_prev[i])
+	abort ();
+
+      if (u64_ld[i] != u64_update[i])
+	abort ();
+
+      if (u64_st[i] != u64_update[i])
+	abort ();
+    }
+
+  return 0;
+}