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author | willschm <willschm@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-10-27 17:52:55 +0000 |
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committer | willschm <willschm@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-10-27 17:52:55 +0000 |
commit | a4ba04ec993f2b05db4098cc11ec3a2af2df9d04 (patch) | |
tree | 831bea76fea7f24200c5ae79c74f2821bd3f4a02 | |
parent | 2b87662b1b63f423d4d36e82bfc00ea37ef5f5c7 (diff) | |
download | gcc-a4ba04ec993f2b05db4098cc11ec3a2af2df9d04.tar.gz |
[testsuite]
2017-10-27 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-neg-char.c: New.
* gcc.target/powerpc/fold-vec-neg-floatdouble.c: New.
* gcc.target/powerpc/fold-vec-neg-int.c: New.
* gcc.target/powerpc/fold-vec-neg-longlong.c: New.
* gcc.target/powerpc/fold-vec-neg-short.c: New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@254164 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/testsuite/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-neg-char.c | 19 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c | 23 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-neg-int.c | 18 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-neg-longlong.c | 18 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/fold-vec-neg-short.c | 18 |
6 files changed, 104 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2fb6daaf214..b8dac7e625a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2017-10-27 Will Schmidt <will_schmidt@vnet.ibm.com> + + * gcc.target/powerpc/fold-vec-neg-char.c: New. + * gcc.target/powerpc/fold-vec-neg-floatdouble.c: New. + * gcc.target/powerpc/fold-vec-neg-int.c: New. + * gcc.target/powerpc/fold-vec-neg-longlong.c: New. + * gcc.target/powerpc/fold-vec-neg-short.c: New. + 2017-10-27 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/56342 diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-char.c new file mode 100644 index 00000000000..19ea3d3184a --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-char.c @@ -0,0 +1,19 @@ +/* Verify that overloaded built-ins for vec_neg with char + inputs produce the right code. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include <altivec.h> + +vector signed char +test2 (vector signed char x) +{ + return vec_neg (x); +} + +/* { dg-final { scan-assembler-times "xxspltib|vspltisw|vxor" 1 } } */ +/* { dg-final { scan-assembler-times "vsububm" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsb" 0 } } */ + diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c new file mode 100644 index 00000000000..79ad92465a2 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-floatdouble.c @@ -0,0 +1,23 @@ +/* Verify that overloaded built-ins for vec_neg with float and + double inputs for VSX produce the right code. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_vsx_ok } */ +/* { dg-options "-mvsx -O2" } */ + +#include <altivec.h> + +vector float +test1 (vector float x) +{ + return vec_neg (x); +} + +vector double +test2 (vector double x) +{ + return vec_neg (x); +} + +/* { dg-final { scan-assembler-times "xvnegsp" 1 } } */ +/* { dg-final { scan-assembler-times "xvnegdp" 1 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-int.c new file mode 100644 index 00000000000..d6ca1283bc9 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-int.c @@ -0,0 +1,18 @@ +/* Verify that overloaded built-ins for vec_neg with int + inputs produce the right code. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include <altivec.h> + +vector signed int +test1 (vector signed int x) +{ + return vec_neg (x); +} + +/* { dg-final { scan-assembler-times "xxspltib|vspltisw|vxor" 1 } } */ +/* { dg-final { scan-assembler-times "vsubuwm" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsw" 0 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-longlong.c new file mode 100644 index 00000000000..48f71788648 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-longlong.c @@ -0,0 +1,18 @@ +/* Verify that overloaded built-ins for vec_neg with long long + inputs produce the right code. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mpower8-vector -O2" } */ + +#include <altivec.h> + +vector signed long long +test3 (vector signed long long x) +{ + return vec_neg (x); +} + +/* { dg-final { scan-assembler-times "xxspltib|vspltisw" 1 } } */ +/* { dg-final { scan-assembler-times "vsubudm" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsd" 0 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-short.c new file mode 100644 index 00000000000..997a9d48617 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-neg-short.c @@ -0,0 +1,18 @@ +/* Verify that overloaded built-ins for vec_neg with short + inputs produce the right code. */ + +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O2" } */ + +#include <altivec.h> + +vector signed short +test3 (vector signed short x) +{ + return vec_neg (x); +} + +/* { dg-final { scan-assembler-times "xxspltib|vspltisw|vxor" 1 } } */ +/* { dg-final { scan-assembler-times "vsubuhm" 1 } } */ +/* { dg-final { scan-assembler-times "vmaxsh" 0 } } */ |