gcc/ChangeLog:

2017-07-25  Carl Love  <cel@us.ibm.com>

	* doc/extend.texi: Update the built-in documentation file for the
	existing built-in functions
	vector signed char vec_cnttz (vector signed char);
	vector unsigned char vec_cnttz (vector unsigned char);
	vector signed short vec_cnttz (vector signed short);
	vector unsigned short vec_cnttz (vector unsigned short);
	vector signed int vec_cnttz (vector signed int);
	vector unsigned int vec_cnttz (vector unsigned int);
	vector signed long long vec_cnttz (vector signed long long);
	vector unsigned long long vec_cnttz (vector unsigned long long);

gcc/testsuite/ChangeLog:

2017-07-25  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/builtins-4-p9-runnable.c:  Add test file for
	vec_cnttz builtins.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@250549 138bc75d-0d04-0410-961f-82ee72b054a4

4 files changed, 122 insertions, 0 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a5c563c43e6..558d318f892 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2017-07-25  Carl Love  <cel@us.ibm.com>
+
+	* doc/extend.texi: Update the built-in documentation file for the
+	existing built-in functions
+	vector signed char vec_cnttz (vector signed char);
+	vector unsigned char vec_cnttz (vector unsigned char);
+	vector signed short vec_cnttz (vector signed short);
+	vector unsigned short vec_cnttz (vector unsigned short);
+	vector signed int vec_cnttz (vector signed int);
+	vector unsigned int vec_cnttz (vector unsigned int);
+	vector signed long long vec_cnttz (vector signed long long);
+	vector unsigned long long vec_cnttz (vector unsigned long long);
+
 2017-07-25  Andrew Pinski  <apinski@cavium.com>
 
 	* tree-ssa-uninit.c (warn_uninitialized_vars): Don't warn about memory
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 562666e8263..156f7f2569c 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -15453,6 +15453,15 @@ vector bool short vec_cmpnez (vector unsigned short arg1, vector unsigned short
 vector bool int vec_cmpnez (vector signed int arg1, vector signed int arg2);
 vector bool int vec_cmpnez (vector unsigned int, vector unsigned int);
 
+vector signed char vec_cnttz (vector signed char);
+vector unsigned char vec_cnttz (vector unsigned char);
+vector signed short vec_cnttz (vector signed short);
+vector unsigned short vec_cnttz (vector unsigned short);
+vector signed int vec_cnttz (vector signed int);
+vector unsigned int vec_cnttz (vector unsigned int);
+vector signed long long vec_cnttz (vector signed long long);
+vector unsigned long long vec_cnttz (vector unsigned long long);
+
 signed int vec_cntlz_lsbb (vector signed char);
 signed int vec_cntlz_lsbb (vector unsigned char);
 
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6b0336c6270..ba9e571982b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-07-25  Carl Love  <cel@us.ibm.com>
+
+	* gcc.target/powerpc/builtins-4-p9-runnable.c:  Add test file for
+	vec_cnttz builtins.
+
 2017-07-25 Eric Botcazou  <ebotcazou@adacore.com>
 
 	* gnat.dg/opt66.adb: New test.
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-4-p9-runnable.c b/gcc/testsuite/gcc.target/powerpc/builtins-4-p9-runnable.c
new file mode 100644
index 00000000000..8e8fcabbe82
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-4-p9-runnable.c
@@ -0,0 +1,95 @@
+/* { dg-do run { target { powerpc*-*-* && { p9vector_hw } } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-options "-mcpu=power9 -O2 " } */
+
+#include <altivec.h> // vector
+
+void abort (void);
+
+int main() {
+  int i;
+
+  vector signed char vsca, vscr, vscexpt;
+  vector unsigned char vuca, vucr, vucexpt;
+  vector signed short int vssa, vssr, vssexpt;
+  vector unsigned short int vusa, vusr, vusexpt;
+  vector signed int vsia, vsir, vsiexpt;
+  vector unsigned int vuia, vuir, vuiexpt;
+  vector signed long long vslla, vsllr, vsllexpt;
+  vector unsigned long long vulla, vullr, vullexpt;
+
+  vsca = (vector signed char) {0, 1, 2, 3, 4, 5, 6, 7,
+			       8, 9, 10, 11, 12, 13, 14, 15};
+
+  vscexpt = (vector signed char) {8, 0, 1, 0, 2, 0, 1, 0,
+				  3, 0, 1, 0, 2, 0, 1, 0};
+
+  vuca = (vector unsigned char) {'0', '3', '6', '9', 'A', 'B', 'E', 'F',
+				 'G', 'H', 'I', 'J', 'K', 'L', 'M', 'N'};
+											
+  vucexpt = (vector unsigned char) {4, 0, 1, 0, 0, 1, 0, 1,
+				    0, 3, 0, 1, 0, 2, 0, 1};
+
+  vssa = (vector short int) {0x1, 0x10, 0x100, 0x1000,
+			     0x2, 0x20, 0x200, 0x2000};
+
+  vssexpt = (vector short int) {0, 4, 8, 12, 1, 5, 9, 13};
+
+  vusa = (vector unsigned short int) {0x4, 0x40, 0x400, 0x4000,
+				      0x8, 0x80, 0x800, 0x8000};
+  vusexpt = (vector unsigned short int) {2, 6, 10, 14, 3, 7, 11, 15};
+
+  vsia = (vector int) {0x10000, 0x100000, 0x1000000, 0x10000000};
+  vsiexpt = (vector int){16, 20, 24, 28};
+
+  vuia = (vector unsigned int) {0x2, 0x20, 0x200, 0x2000};
+  vuiexpt = (vector unsigned int){1, 5, 9, 13};
+
+  vslla = (vector long long) {0x0000000000010000LL, 0x0001000100010000LL};
+  vsllexpt = (vector long long){16, 16};
+
+  vulla = (vector unsigned long long) {0x0000400000000000LL, 0x0080000000000000ULL};
+
+  vullexpt = (vector unsigned long long) {46, 55};
+
+  vscr = vec_cnttz (vsca);
+  vucr = vec_cnttz (vuca);
+  vssr = vec_cnttz (vssa);
+  vusr = vec_cnttz (vusa);
+  vsir = vec_cnttz (vsia);
+  vuir = vec_cnttz (vuia);
+  vsllr = vec_cnttz (vslla);
+  vullr = vec_cnttz (vulla);
+
+  for (i=0; i<16; i++) {
+    if (vscr[i] != vscexpt[i])
+      abort();
+
+    if (vucr[i] != vucexpt[i])
+      abort();
+  }
+
+  for (i=0; i<8; i++) {
+    if (vssr[i] != vssexpt[i])
+      abort();
+
+    if (vusr[i] != vusexpt[i])
+      abort();
+  }
+
+  for (i=0; i<4; i++) {
+    if (vsir[i] != vsiexpt[i])
+      abort();
+
+    if (vuir[i] != vuiexpt[i])
+      abort();
+  }
+
+  for (i=0; i<2; i++) {
+    if (vsllr[i] != vsllexpt[i])
+      abort();
+
+    if (vullr[i] != vullexpt[i])
+      abort();
+  }	
+}