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| author | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-02-17 16:23:55 +0000 |
|---|---|---|
| committer | wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4> | 2016-02-17 16:23:55 +0000 |
| commit | e3c242792e6c0faca31e9bf664678af586868171 (patch) | |
| tree | 841e3ed6d0c1ec17e6ede2adc85b88fd86b3d64a | |
| parent | d68ff2d804a894af783ba50c5cbe4d34f6e637d6 (diff) | |
| download | gcc-e3c242792e6c0faca31e9bf664678af586868171.tar.gz | |
[gcc]
2016-02-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.md (*altivec_lvxl_<mode>_internal): Output
correct instruction.
[gcc/testsuite]
2012-02-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-cg.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@233499 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/rs6000/altivec.md | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/vec-cg.c | 22 |
4 files changed, 32 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4646617cd57..aa43b076c39 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2016-02-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * config/rs6000/altivec.md (*altivec_lvxl_<mode>_internal): Output + correct instruction. + 2016-02-17 Richard Biener <rguenther@suse.de> PR rtl-optimization/69609 diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index d1f6acff977..9c3084dcb8b 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -2511,7 +2511,7 @@ (match_operand:VM2 1 "memory_operand" "Z")) (unspec [(const_int 0)] UNSPEC_SET_VSCR)])] "TARGET_ALTIVEC" - "lvx %0,%y1" + "lvxl %0,%y1" [(set_attr "type" "vecload")]) (define_expand "altivec_lvx_<mode>" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dcc68645739..ce80cf7f04f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2012-02-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com> + + * gcc.target/powerpc/vec-cg.c: New test. + 2016-02-17 Richard Biener <rguenther@suse.de> PR testsuite/69586 diff --git a/gcc/testsuite/gcc.target/powerpc/vec-cg.c b/gcc/testsuite/gcc.target/powerpc/vec-cg.c new file mode 100644 index 00000000000..c31d217d880 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/vec-cg.c @@ -0,0 +1,22 @@ +/* Test code generation of vector built-ins. We don't have this for + most of ours today. As new built-ins are added, please add to this + test case. Update as necessary to add VSX, P8-vector, P9-vector, + etc. */ + +/* { dg-do compile { target powerpc*-*-* } } */ +/* { dg-require-effective-target powerpc_altivec_ok } */ +/* { dg-options "-maltivec -O0" } */ + +#include <altivec.h> + +static vector signed int i, *pi; +static int int1; + +void +b() +{ + i = __builtin_altivec_lvxl (int1, pi); + i = vec_lvxl (int1, pi); +} + +/* { dg-final { scan-assembler-times "lvxl" 2 } } */ |