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author | dwarak <dwarak@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-01 19:48:29 +0000 |
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committer | dwarak <dwarak@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-01 19:48:29 +0000 |
commit | ba29708abe19a789712fd8036d1a4d7a648eeedf (patch) | |
tree | f4d181c6cb1f31e2449181d325bf2e4c9b5573ed | |
parent | 51d33eba94cf1ae52f7a1bfdad7aed1f211e586d (diff) | |
download | gcc-ba29708abe19a789712fd8036d1a4d7a648eeedf.tar.gz |
Accept k8-sse3, opteron-sse3 and athlon64-sse3 as improved versions of k8,opteron and athlon64 with SSE3 instruction set support
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@124340 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ea6854422a5..3ee41a5f6d5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> + * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 + and athlon64-sse3 as improved versions of k8, opteron and athlon64 + with SSE3 instruction set support. + * doc/invoke.texi: Likewise. + +2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> + * config/i386/i386.c (override_options): Tuning 32-byte loop alignment for amdfam10 architecture. Increasing the max loop alignment to 24 bytes. |