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authorhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>2012-05-20 21:34:14 +0000
committerhjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>2012-05-20 21:34:14 +0000
commitdb3de9065ef1c2fedc8f1cd0d7e983d1d8b451c0 (patch)
treeb23677c777d248d5043a2e0c934f52930dec6133
parentc91c51885bf640d43148e2e639ebb2cb9fc00bd2 (diff)
downloadgcc-db3de9065ef1c2fedc8f1cd0d7e983d1d8b451c0.tar.gz
Add RDRND, F16C and FSGSBASE support to -march=native
* config/i386/driver-i386.c (host_detect_local_cpu): Support RDRND, F16C and FSGSBASE. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@187696 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/i386/driver-i386.c9
2 files changed, 13 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 471c39ae657..f7d72d57e85 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2012-05-20 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/driver-i386.c (host_detect_local_cpu): Support
+ RDRND, F16C and FSGSBASE.
+
2012-05-20 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR rtl-optimzation/53373
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index e93e8d9e5e7..94f38199f10 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -398,6 +398,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
unsigned int has_fma = 0, has_fma4 = 0, has_xop = 0;
unsigned int has_bmi = 0, has_bmi2 = 0, has_tbm = 0, has_lzcnt = 0;
unsigned int has_hle = 0, has_rtm = 0;
+ unsigned int has_rdrnd = 0, has_f16c = 0, has_fsgsbase = 0;
bool arch;
@@ -445,6 +446,8 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_aes = ecx & bit_AES;
has_pclmul = ecx & bit_PCLMUL;
has_fma = ecx & bit_FMA;
+ has_f16c = ecx & bit_F16C;
+ has_rdrnd = ecx & bit_RDRND;
has_cmpxchg8b = edx & bit_CMPXCHG8B;
has_cmov = edx & bit_CMOV;
@@ -461,6 +464,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
has_rtm = ebx & bit_RTM;
has_avx2 = ebx & bit_AVX2;
has_bmi2 = ebx & bit_BMI2;
+ has_fsgsbase = ebx & bit_FSGSBASE;
}
/* Check cpuid level of extended features. */
@@ -733,11 +737,14 @@ const char *host_detect_local_cpu (int argc, const char **argv)
const char *lzcnt = has_lzcnt ? " -mlzcnt" : " -mno-lzcnt";
const char *hle = has_hle ? " -mhle" : " -mno-hle";
const char *rtm = has_rtm ? " -mrtm" : " -mno-rtm";
+ const char *rdrnd = has_rdrnd ? " -mrdrnd" : " -mno-rdrnd";
+ const char *f16c = has_f16c ? " -mf16c" : " -mno-f16c";
+ const char *fsgsbase = has_fsgsbase ? " -mfsgsbase" : " -mno-fsgsbase";
options = concat (options, cx16, sahf, movbe, ase, pclmul,
popcnt, abm, lwp, fma, fma4, xop, bmi, bmi2,
tbm, avx, avx2, sse4_2, sse4_1, lzcnt, rtm,
- hle, NULL);
+ hle, rdrnd, f16c, fsgsbase, NULL);
}
done: