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authorbergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4>2016-09-10 01:36:33 +0000
committerbergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4>2016-09-10 01:36:33 +0000
commit9731eaaf24dbf9c32f5f1dc227023f8bf1f6fb70 (patch)
treec26256b01d78742b01f07daa23c8fa8aab2fae4c
parentf8587f272330d59d6938bbb30a7b1f02a314660b (diff)
downloadgcc-9731eaaf24dbf9c32f5f1dc227023f8bf1f6fb70.tar.gz
gcc/
PR rtl-optimization/77289 * lra-constraints.c (get_final_hard_regno): Add support for non hard register numbers. Remove support for subregs. (get_hard_regno): Use SUBREG_P. Don't call get_final_hard_regno(). (get_reg_class): Delete removed get_final_hard_regno() argument. (uses_hard_regs_p): Call get_final_hard_regno(). gcc/testsuite/ PR rtl-optimization/77289 * gcc.target/powerpc/pr77289.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@240065 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/lra-constraints.c35
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/powerpc/pr77289.c31
4 files changed, 63 insertions, 17 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 68921618973..22193334165 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2016-09-09 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR rtl-optimization/77289
+ * lra-constraints.c (get_final_hard_regno): Add support for non hard
+ register numbers. Remove support for subregs.
+ (get_hard_regno): Use SUBREG_P. Don't call get_final_hard_regno().
+ (get_reg_class): Delete removed get_final_hard_regno() argument.
+ (uses_hard_regs_p): Call get_final_hard_regno().
+
2016-09-09 Martin Sebor <msebor@redhat.com>
PR c/77520
diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index 053a65aa404..73cee924ea8 100644
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -182,21 +182,22 @@ get_try_hard_regno (int regno)
return ira_class_hard_regs[rclass][0];
}
-/* Return final hard regno (plus offset) which will be after
- elimination. We do this for matching constraints because the final
- hard regno could have a different class. */
+/* Return the final hard regno which will be after elimination.
+ We do this because the final hard regno could have a different class. */
static int
-get_final_hard_regno (int hard_regno, int offset)
+get_final_hard_regno (int regno)
{
- if (hard_regno < 0)
- return hard_regno;
- hard_regno = lra_get_elimination_hard_regno (hard_regno);
- return hard_regno + offset;
+ if (! HARD_REGISTER_NUM_P (regno))
+ regno = lra_get_regno_hard_regno (regno);
+ if (regno < 0)
+ return regno;
+ return lra_get_elimination_hard_regno (regno);
}
-/* Return hard regno of X after removing subreg and making
- elimination. If X is not a register or subreg of register, return
- -1. For pseudo use its assignment. */
+/* Return the hard regno of X after removing its subreg. If X is not
+ a register or a subreg of a register, return -1. If X is a pseudo,
+ use its assignment. We do not process register eliminiations while
+ matching constraints. See PR77289. */
static int
get_hard_regno (rtx x)
{
@@ -204,19 +205,19 @@ get_hard_regno (rtx x)
int offset, hard_regno;
reg = x;
- if (GET_CODE (x) == SUBREG)
+ if (SUBREG_P (x))
reg = SUBREG_REG (x);
if (! REG_P (reg))
return -1;
- if ((hard_regno = REGNO (reg)) >= FIRST_PSEUDO_REGISTER)
+ if (! HARD_REGISTER_NUM_P (hard_regno = REGNO (reg)))
hard_regno = lra_get_regno_hard_regno (hard_regno);
if (hard_regno < 0)
return -1;
offset = 0;
- if (GET_CODE (x) == SUBREG)
+ if (SUBREG_P (x))
offset += subreg_regno_offset (hard_regno, GET_MODE (reg),
SUBREG_BYTE (x), GET_MODE (x));
- return get_final_hard_regno (hard_regno, offset);
+ return hard_regno + offset;
}
/* If REGNO is a hard register or has been allocated a hard register,
@@ -232,7 +233,7 @@ get_reg_class (int regno)
hard_regno = lra_get_regno_hard_regno (regno);
if (hard_regno >= 0)
{
- hard_regno = get_final_hard_regno (hard_regno, 0);
+ hard_regno = get_final_hard_regno (hard_regno);
return REGNO_REG_CLASS (hard_regno);
}
if (regno >= new_regno_start)
@@ -1712,7 +1713,7 @@ uses_hard_regs_p (rtx x, HARD_REG_SET set)
if (REG_P (x))
{
- x_hard_regno = get_hard_regno (x);
+ x_hard_regno = get_final_hard_regno (REGNO (x));
return (x_hard_regno >= 0
&& overlaps_hard_reg_set_p (set, mode, x_hard_regno));
}
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 93c2826a093..3d9e0b2a6da 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-09-09 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR rtl-optimization/77289
+ * gcc.target/powerpc/pr77289.c: New test.
+
2016-09-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/77420
diff --git a/gcc/testsuite/gcc.target/powerpc/pr77289.c b/gcc/testsuite/gcc.target/powerpc/pr77289.c
new file mode 100644
index 00000000000..f8ebf1f9309
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr77289.c
@@ -0,0 +1,31 @@
+/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
+/* { dg-options "-O3 -mcpu=power7 -funroll-loops -ffast-math -mlra -mupdate -fno-auto-inc-dec" } */
+
+/* PR 77289: LRA ICEs due to invalid constraint checking. */
+
+void dummy0 (float *);
+float bar0 (float);
+void
+foo0 (long a, long b)
+{
+ float c[0];
+ b = 0;
+ for (; b < a; b++)
+ c[b] = bar0 (c[b]);
+ dummy0 (c);
+}
+
+void dummy1 (long *);
+long bar1 (long);
+void
+foo1 (long a, long b)
+{
+ long array[128];
+ long *c = array;
+ for (b=0; b < a; b++)
+ c[b] = bar1 (c[b]);
+ dummy1 (c);
+}