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| author | jgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-07-14 15:48:57 +0000 |
|---|---|---|
| committer | jgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-07-14 15:48:57 +0000 |
| commit | e67893ba55e68b60f41e27d734b580455d14d3fa (patch) | |
| tree | 4aaef92fb51f50d503a5d28cc39919c4ed982303 | |
| parent | 1b14d19e26c237b6131cd86684f8f0a4305f7f04 (diff) | |
| download | gcc-e67893ba55e68b60f41e27d734b580455d14d3fa.tar.gz | |
[Patch ARM] Document the +crypto extension on CPUs.
We don't document the list of CPU names which can take a +crypto extension
in the ARM port. This patch fixes that oversight.
gcc/
2017-14-07 James Greenhalgh <james.greenhalgh@arm.com>
* doc/invoke.texi (arm/-mcpu): Document +crypto.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@250207 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 8 |
2 files changed, 12 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a9ab5ba4b61..3c8effb88de 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2017-07-14 James Greenhalgh <james.greenhalgh@arm.com> + + * doc/invoke.texi (arm/-mcpu): Document +crypto. + 2017-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm-c.c (arm_cpu_builtins): Define diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 9cf85d10890..b9d071b3746 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -15636,6 +15636,14 @@ on @samp{cortex-r5}, @samp{cortex-r52} and @samp{cortex-m7}. Disables the SIMD (but not floating-point) instructions on @samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7} and @samp{cortex-a9}. + +@item +crypto +Enables the cryptographic instructions on @samp{cortex-a32}, +@samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55}, @samp{cortex-a57}, +@samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75}, @samp{exynos-m1}, +@samp{xgene1}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, +@samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53} and +@samp{cortex-a75.cortex-a55}. @end table Additionally the @samp{generic-armv7-a} pseudo target defaults to |