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authorthopre01 <thopre01@138bc75d-0d04-0410-961f-82ee72b054a4>2017-07-14 15:26:28 +0000
committerthopre01 <thopre01@138bc75d-0d04-0410-961f-82ee72b054a4>2017-07-14 15:26:28 +0000
commit1b14d19e26c237b6131cd86684f8f0a4305f7f04 (patch)
tree9053fc21b40a7611520f7e488a13d0ebed1205f3
parent65f21a701120a58154b05866c0ec912024f09024 (diff)
downloadgcc-1b14d19e26c237b6131cd86684f8f0a4305f7f04.tar.gz
[ARM] Fix definition of __ARM_FEATURE_NUMERIC_MAXMIN
Definition of __ARM_FEATURE_NUMERIC_MAXMIN checks for TARGET_ARM_ARCH >= 8 and TARGET_NEON being true in addition to TARGET_VFP5. However, instructions covered by this macro are part of FPv5 which is available in ARMv7E-M architecture. This commit fixes the macro to only check for TARGET_VFP5. 2017-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_NUMERIC_MAXMIN solely based on TARGET_VFP5. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@250206 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/arm/arm-c.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4fb6a924b0c..a9ab5ba4b61 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,10 @@
2017-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
+ * config/arm/arm-c.c (arm_cpu_builtins): Define
+ __ARM_FEATURE_NUMERIC_MAXMIN solely based on TARGET_VFP5.
+
+2017-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
+
* config/arm/arm-cpus.in (cortex-r52): Add new entry.
(armv8-r): Set ARM Cortex-R52 as default CPU.
* config/arm/arm-tables.opt: Regenerate.
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 9178937b6d9..6ab50f7ee33 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -96,7 +96,7 @@ arm_cpu_builtins (struct cpp_reader* pfile)
|| TARGET_ARM_ARCH_ISA_THUMB >=2));
def_or_undef_macro (pfile, "__ARM_FEATURE_NUMERIC_MAXMIN",
- TARGET_ARM_ARCH >= 8 && TARGET_NEON && TARGET_VFP5);
+ TARGET_VFP5);
def_or_undef_macro (pfile, "__ARM_FEATURE_SIMD32", TARGET_INT_SIMD);