diff options
author | Andrew Pinski <apinski@marvell.com> | 2021-11-10 18:37:22 +0000 |
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committer | Andrew Pinski <apinski@marvell.com> | 2021-11-10 22:06:23 +0000 |
commit | c744ae0897957def0cd798399ef8ed6dc0d23811 (patch) | |
tree | 7794fbfc8312a6c6f37f0992b04613cbca040253 | |
parent | abc2f01914d6c4703de26c402fb579a9a2d0dba4 (diff) | |
download | gcc-c744ae0897957def0cd798399ef8ed6dc0d23811.tar.gz |
[COMMITTED] aarch64: [PR103170] Fix aarch64_simd_dup<mode>
The problem here is aarch64_simd_dup<mode> use
the vw iterator rather than vwcore iterator. This causes
problems for the V4SF and V2DF modes. I changed both of
aarch64_simd_dup<mode> patterns to be consistent.
Committed as obvious after a bootstrap/test on aarch64-linux-gnu.
PR target/103170
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>):
Use vwcore iterator for the r constraint output string.
gcc/testsuite/ChangeLog:
* gcc.c-torture/compile/vector-dup-1.c: New test.
-rw-r--r-- | gcc/config/aarch64/aarch64-simd.md | 4 | ||||
-rw-r--r-- | gcc/testsuite/gcc.c-torture/compile/vector-dup-1.c | 15 |
2 files changed, 17 insertions, 2 deletions
diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 54d7ca4ba0a..1020cd9ee64 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -69,7 +69,7 @@ "TARGET_SIMD" "@ dup\\t%0.<Vtype>, %1.<Vetype>[0] - dup\\t%0.<Vtype>, %<vw>1" + dup\\t%0.<Vtype>, %<vwcore>1" [(set_attr "type" "neon_dup<q>, neon_from_gp<q>")] ) @@ -80,7 +80,7 @@ "TARGET_SIMD" "@ dup\\t%0.<Vtype>, %1.<Vetype>[0] - dup\\t%0.<Vtype>, %<vw>1" + dup\\t%0.<Vtype>, %<vwcore>1" [(set_attr "type" "neon_dup<q>, neon_from_gp<q>")] ) diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-dup-1.c b/gcc/testsuite/gcc.c-torture/compile/vector-dup-1.c new file mode 100644 index 00000000000..3475360462b --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/vector-dup-1.c @@ -0,0 +1,15 @@ +/* { dg-additional-options "-fno-strict-aliasing" } */ + + +/* PR target/103170 */ +/* AARCH64 used to ICE on this for a typo in the string template. */ +#define vector __attribute__((vector_size(4*sizeof(float)))) + +typedef vector float v4sf; + +v4sf f(int t) +{ + float tt = *(float*)&t; + asm("":"+r"(tt)); + return (v4sf){tt,tt,tt,tt}; +} |