diff options
author | Jeffrey A Law <law@cygnus.com> | 1999-01-21 22:29:14 +0000 |
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committer | Jeff Law <law@gcc.gnu.org> | 1999-01-21 15:29:14 -0700 |
commit | c2ad275ae9e409d1f65822609ab0bdaba89b141f (patch) | |
tree | 965336a2203c776de245568f3b36fab039d64a36 | |
parent | 238860155d9b48b330ead01ed61fd52371924855 (diff) | |
download | gcc-c2ad275ae9e409d1f65822609ab0bdaba89b141f.tar.gz |
m68k.md (ashldi_const): Disable for !TARGET_5200.
* m68k.md (ashldi_const): Disable for !TARGET_5200. Fix indention.
(ashldi3 expander): Similarly. Update comments.
(ashrdi_const, lshrdi_const): Fix indention.
(ashrdi3, lshrdi3): FIx indention. Update comments.
From-SVN: r24814
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/m68k/m68k.md | 49 |
2 files changed, 35 insertions, 21 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7aa9b3054d7..05e53cb749d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +Thu Jan 21 23:21:57 1999 Jeffrey A Law (law@cygnus.com) + + * m68k.md (ashldi_const): Disable for !TARGET_5200. Fix indention. + (ashldi3 expander): Similarly. Update comments. + (ashrdi_const, lshrdi_const): Fix indention. + (ashrdi3, lshrdi3): FIx indention. Update comments. + Thu Jan 21 21:53:36 1999 Richard Henderson <rth@cygnus.com> * emit-rtl.c (try_split): Don't try to split non-instructions. diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 562fb07e2a6..83d5c83d05e 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -1,5 +1,5 @@ ;;- Machine description for GNU compiler, Motorola 68000 Version -;; Copyright (C) 1987, 88, 93-97, 1998 Free Software Foundation, Inc. +;; Copyright (C) 1987, 88, 93-98, 1999 Free Software Foundation, Inc. ;; This file is part of GNU CC. @@ -4563,9 +4563,10 @@ [(set (match_operand:DI 0 "general_operand" "=d") (ashift:DI (match_operand:DI 1 "general_operand" "0") (match_operand 2 "const_int_operand" "n")))] - "((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3) - || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16 - || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))" + "(!TARGET_5200 + && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3) + || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16 + || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63)))" "* { operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); @@ -4594,13 +4595,15 @@ [(set (match_operand:DI 0 "general_operand" "") (ashift:DI (match_operand:DI 1 "general_operand" "") (match_operand 2 "const_int_operand" "")))] - "" + "!TARGET_5200" " { + /* ??? This is a named pattern like this is not allowed to FAIL based + on its operands. */ if (GET_CODE (operands[2]) != CONST_INT - || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3) - && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16 - && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63))) + || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3) + && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16 + && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63))) FAIL; } ") @@ -4763,11 +4766,11 @@ [(set (match_operand:DI 0 "general_operand" "=d") (ashiftrt:DI (match_operand:DI 1 "general_operand" "0") (match_operand 2 "const_int_operand" "n")))] - "!TARGET_5200 + "(!TARGET_5200 && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3) - || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16 - || INTVAL (operands[2]) == 31 - || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))" + || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16 + || INTVAL (operands[2]) == 31 + || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63)))" "* { operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); @@ -4806,10 +4809,12 @@ "!TARGET_5200" " { + /* ??? This is a named pattern like this is not allowed to FAIL based + on its operands. */ if (GET_CODE (operands[2]) != CONST_INT - || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3) - && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16 - && (INTVAL (operands[2]) < 31 || INTVAL (operands[2]) > 63))) + || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3) + && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16 + && (INTVAL (operands[2]) < 31 || INTVAL (operands[2]) > 63))) FAIL; } ") @@ -4934,10 +4939,10 @@ [(set (match_operand:DI 0 "general_operand" "=d") (lshiftrt:DI (match_operand:DI 1 "general_operand" "0") (match_operand 2 "const_int_operand" "n")))] - "!TARGET_5200 + "(!TARGET_5200 && ((INTVAL (operands[2]) >= 1 && INTVAL (operands[2]) <= 3) - || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16 - || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63))" + || INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16 + || (INTVAL (operands[2]) > 32 && INTVAL (operands[2]) <= 63)))" "* { operands[1] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1); @@ -4972,10 +4977,12 @@ "!TARGET_5200" " { + /* ??? This is a named pattern like this is not allowed to FAIL based + on its operands. */ if (GET_CODE (operands[2]) != CONST_INT - || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3) - && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16 - && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63))) + || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3) + && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16 + && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63))) FAIL; } ") |